025752B Search Results

pal22v10

Abstract: stag ppz
Contextual Info: ADV MICRO PLA/PLE/ARRAYS 4ÔE J> COM’L 025752b DG3207Ö T -<3 P A L 2 2 V 1 0 -7 7.5 ns 24-Pin TTL Versatile PAL Device Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • ■ ■ ■ 7.5 ns propagation delay and 91 MHz fMAX 10 macrocells programmable as registered or

single one jk flipflop

Abstract: PAL22R
Contextual Info: DE:| 025752b DD271* S 7 ADV MICRO PL A/ PL E/ AR R AYS Tt PAL22RX8A High Speed Programmable Array Logic T-46-13-47 Ordering Information Features/Benefits • Programmable flip-flops allow J-K, S-R, T or D-typet for the most efficient use of product terms • 8 Input/output macrocells for flexibility

PAL26V16

Abstract: teradyne lasar
Contextual Info: FINAL COM’L: -15/20 IND: -18/24 Z I Advanced Micro Devices M A C H 1 3 0 - 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 84 Pins ■ 64 Outputs ■ 64 Macrocells ■ 64 Flip-flops; 4 clock choices ■ 15 ns tpD Commercial

aeg diode Si 11 K

Abstract: aeg diode Si 11 aeg Diode D6 aeg diode Si 11 n
Contextual Info: ADV MICRO P LA / P L E / A R R AY S It D E | 02S75EL. OOSTMST Û T-46-13-47 Zero Power CMOS Hard Array Logic ZHAL 24A Series Features/Benefits Ordering information • Zero standby power PART NUM BER • Low power operation PACKAGE • High-speed C M O S technology

htw 323

Abstract: plji palce programming algorithm
Contextual Info: COM’L: H-5/7/10/15/25, Q-10/15/25 IND: H-15/25. Q-20/25 MIL: H-15/20/25 PALCE20V8 Family EE CMOS 24-Pin Universal Programmable Array Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Pin, function and fuse-map compatible with all GAL 20V8/AS ■ Electrically erasable CMOS technology pro­

8L14

Abstract: pal6l16acns PAL6L16A
Contextual Info: ADV M I C R O P L A / P L E / A R R A Y S 1t / Ï Ë J Q2S7Sat OüäVl'H 8 T-46-13-47&#39; Decoder Series 6L16A 8L14A Ordering Inform ation Features/B enefits • 14 to 16 output* PAL6L16A C NS STD • Efficient Implementation of decoder« PROGRAMMABLE ARRAY LOGIC

Contextual Info: P R E L IM IN A R Y COM’L: -15/20 M A C H 4 6 5 -1 5 /2 0 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 208 pins In PQFP ■ Up to 20 product terms per function, with XOR ■ JTAG, 5-V, In-circult programmable

Contextual Info: FINAL COM’L: -7.5/10/12/15/20 a Advanced Micro Devices M A C H 1 3 1 -7 / 1 0 / 1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • ■ ■ ■ ■ Programmable power-down mode 64 Outputs 64 Flip-flops; 4 clock choices

pal 014

Contextual Info: PRELIMINARY COM’L: -15/20 MACH355-15/20 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 144 Pins In PQFP ■ Up to 20 product terms per function, with XOR ■ JTAG, 5-V, In-circuit programmable ■ Flexible clocking

Contextual Info: CO M ’L: -5/7.5/10/12/15/20 M A C H 1 11 -5 /7 /1 0 /1 2 /1 5 /2 0 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ Program m able power-down mode ■ 32 M acrocells ■ ■ 5 ns tpD ■ 32 Flip-flops; 4 clock choices

14L4

Abstract: 10l8 12L6 12H6 16c1 4511 logic diagram 1117 L schematic diagram PAL14L pin shourd PAL10H8
Contextual Info: ADV MICRO PLA/PL E/ ARR AY S =ib U2 b7526 ADV MICRO P L A / P L E / ARRAYS D E | 055755b 0057114 7 96D 27114 D T-V6-/3-V7 Combinatorial PALI 0H8 Series 1 0 H 8 , 1 2 H 6 , 1 4 H 4 , 1 6 H 2 1 6 C 1 1 0 L 8 , 1 2 L 6 , 1 4 L 4 - , 1 6 L 2 Ordering Information

Contextual Info: FINAL a COM’L: -12 Advanced Micro Devices M A C H L V 2 1 0 - 1 2 High Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3-V JEDEC compatible — V c c = +3.0 V to +3.6 V ■ 58 MHz fMAxexternal Commercial ■ 38 Inputs with advanced pull-up/pull-down

mach 3 family amd

Abstract: circuit diagram of QS 8005 PAL26V16 D750 MACH110 MACH210 MACH215 PAL22V10 mach 1 family amd NS4N
Contextual Info: FINAL COM’L: -7.5/10/12/15/20 IND: -10/12/14/18/24 M A C H 2 1 1 -7 / 1 0 / 1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic Z I Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 64 Macrocells ■ Programmable power-down mode ■ 32 Outputs

PAL16l8 MMI

Abstract: PAL16LA OO3A MARKING PAL 006A pal 007a PLA 16L8 PAL16L8 programming algorithm IC PALCE16 mmi pla programmer reference guide pal 005a
Contextual Info: ADV HICRO PLA/PLE/ARRAYS C O M ’L 2flE 0aS7S2b D OGa^Mb- M IL P A L 1 6 R 8 il \ T -4 6 —1 9 -1 3 Am>a 5 Advanced Micro Devices F a m i l y 20-pin TTL P rogram m able Array Logic DISTINCTIVE CHARACTERISTICS • As fast as 7.5 ns maximum propagation delay

Contextual Info: COM’L: -10/12/15/20 IND: -14/18/24 M A C H 2 2 0 -1 0 /1 2 /1 5 /2 0 High-Density EE CMOS Programmable Logic a Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 68 Pins ■ 48 Outputs ■ 96 Macrocells ■ 96 Flip-flops; 4 clock choices ■ 10nstpD

Contextual Info: FINAL IND: -20 a PALLV16V8Z-20 Advanced Micro Devices Low-Voltage, Zero-Power, 20-Pin EE CMOS Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3 V JEDEC compatible ■ Direct plug-in replacement for the PAL16R8 series and most of the PAL10H8 series

Contextual Info: COM’L: IND: -15/25 a PALCE22V10Z Family Zero-Power 24-Pin EE CMOS Versatile PAL Device Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 10 macrocells programmable as registered or combinatorial, and active high or active low to match application needs

mach231sp

Contextual Info: COM’L: -10/12/15/20 IND: -12/14/18/24 M A C H 2 3 1 S P - 1 0 / 1 2 / 1 5 /2 0 High-Density EE CMOS In-System Programmable Logic a Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • JTAG-Compatible, 5-V in-system programming ■ 100 Pins ■ Peripheral Component Interconnect PCI

Contextual Info: bOE D • D S 5 7 5 2 b D0 33 D3 5 3QS AMDS ADV MICRO P L A / P L E / A R R A Y S COM’L: -15/20 MIL: -20 M A C H 1 3 0 -1 5 /2 0 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS ■ 84 Pins ■ 70 Inputs ■ 64 Macrocells

Contextual Info: COM’L: H-25 H Advanced Micro Devices PALCE29M16H-25 24-Pin EE CMOS Programmable Array Logic DISTINCTIVE CHARACTERISTICS • High-performance semicustom logic replacement; Electrically Erasable EE technology allows reprogrammability Register/Latch Preload permits full logic

Contextual Info: FINAL COM’L: -12/15/20 IND: 14/18/24 a MACH110-12/15/20 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 38 Inputs ■ 32 Macrocells ■ 32 Outputs ■ 12 n s t P D Commercial 14 nstpD Industrial

Contextual Info: COM’L: -12/15/20 IND: -14/18/24 M A C H 2 1 5 -1 2 /1 5 /2 0 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins 38 Inputs with pull-up resistors ■ 32 Output Macrocells 32 Outputs ■ 32 Input Macrocells

Contextual Info: PRELIMINARY M ACH COM’L: -7/10/12/15/20 a 1 1 1 - 7 /1 0 /1 2 /1 5 /2 0 Advanced Micro Devices High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 32 Outputs ■ 32 Macrocells ■ 32 Flip-flops; 4 clock choices ■ 7.5 ns tpD

Contextual Info: FIN AL M A C H 1 1 1 COM’L: -5/7.5/10/12/15/20 IND: -7.5/10/12/14/18/24 AM D£t F a m ily High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ Programmable power-down mode ■ 32 Macrocells ■ 32 Outputs ■ 5 ns tPD ■ 32 Flip-flops; 4 clock choices