10NSTPD Search Results
10NSTPD Datasheets Context Search
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Contextual Info: COM’L: -10/12/15/20 IND: -14/18/24 M A C H 2 2 0 -1 0 /1 2 /1 5 /2 0 High-Density EE CMOS Programmable Logic a Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 68 Pins ■ 48 Outputs ■ 96 Macrocells ■ 96 Flip-flops; 4 clock choices ■ 10nstpD |
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10nstpdpal26v12mach120mach221+5 | |
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Contextual Info: a Advanced Micro Devices MACH230-10 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 84 Pins ■ 64 Outputs ■ 128 Macrocells ■ ■ 10nstPD ■ 8 “PAL26V16” blocks with buried macrocells ■ 77 MHz Imax ■ external 128 Flip-flops; 4 clock choices |
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mach230-1010nstpdpal26v16mach435+5 | |
palce16V8 programming
Abstract: AMD palce16v8 programming palce16v8h20 PALCE16V8Q-25PC palce16v8 programming guide
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h-10/15/25q-15/25h-20/25palce16v8+9 | |
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Contextual Info: PEEL 18CV8 -5/-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Device Features • Multiple Speed, Power, Temperature Options — Speeds ranging from 5ns to 25ns — Power as low as 37mA at 25MHz — Commercial and industrial versions available |
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18cv825mhz20-pinpeel18cv8p-25+2 | |
PAL20L8
Abstract: MMI PAL 20R4 mmi pal20l8 PAL20R4 MMI TOP MARKING amd part marking PAL20R6 PAL20L8 mmi AMD PAL20L8 LA4490
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-10/12/15/b/apal20r824-pinpal20l8+10 | |
philips tea 1090
Abstract: PAL 007 B pal 002 PZ3064 PZ3064-10A44 PZ3064-10BC PZ3064-12A44 PZ3064-12BC PZ3064I12A44 PZ3064I12BC
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pz306450mhzot382-1mo-108cc-1+9 | |
tea 1090
Abstract: bo67 philips tea 1090 PAL 007 B pal 002 PZ3064 PZ5064-10A44 PZ5064-10BC PZ5064-7A44 pal 012 a
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pz506450mhzot382-1mo-108cc-1+10 | |
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Contextual Info: INTEGRATED CIRCUITS m m s ^ e eI It Xiiinx has acquired the entire Philips CoolRunner Low Power CPLD Product Family, For more technical or sales information, please see: www.xilinx.com XCR5128 128 macrocell CPLD Product specification Supersedes data of 1997 Aug 12 |
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xcr5128pz5128ot322-2m0112dd1 | |
palce16v8 programming algorithm
Abstract: palce programmer schematic palce programming Guide PAL AM 16v8 AMD palce16v8 programming pal 010a PALCE16V8H-7 PALCE16V8H-15E4 AM 16v8 gal programming algorithm
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h-7/10/15/25q-15/25h-10/15/20/25palce16v8+14 | |
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Contextual Info: INTEGRATED CIRCUITS l y i E I TI im m Xiiinsc has acquired the entire Philips CoolRunoer Low Power CPLD Product Family, For more technical or sales information, please see; www.xilinx.com 8 £«& ^ S l 8 ft « »0» X ft » 0« XCR5032C 32 macrocell CPLD with enhanced clocking |
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xcr5032cl76-1ot376-1 | |
pal 012 a
Abstract: PAL 012
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pz3064mo-108cc-1t382-1pal 012 a+1 | |
palce16v8 programming algorithmContextual Info: 5TE D • 02 57 5 2 b 00 32 2 7 1 510 MANDE ADV MICRO PLA/PLE/ARRAYS COM’L: H-7/10/15/25, Q-15/25 -_ MIL: H-10/15/20/25 PALCE16V8 Family AdvS EE CMOS 20-Pin Universal Programmable Array Logic Devices DISTINCTIVE CHARACTERISTICS ■ ■ Pin, function and fuse-map compatible with all |
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h-7/10/15/25q-15/25h-10/15/20/25palce16v8+2 | |
pal 012 a
Abstract: PAL 012
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xcr3064xcr3q84pz3064ot382-1+3 | |
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Contextual Info: INTEGRATED CIRCUITS im m l y i E I TI Xilinx has acquired the entire Philips CooIRunner Low Power CPLD Product Family* For more technical or sales informations piease see: www.xilinx.com XCR5064 64 macrocell CPLD Product specification Supersedes data of 1997 Mar 05 |
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xcr5064xcb5064pz5064ot382-1+1 | |
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philips tea 1090
Abstract: mc15 PAL 007 B PAL 007 E pal 002 PZ3064 PZ5064-10A44 PZ5064-10BC PZ5064-7A44 PZ5064-7BC
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pz506450mhzot382-1mo-108cc-1+10 | |
5032-7BContextual Info: Philips Sem iconductors Product specification 32 macrocell CPLD PZ5032 FEATURES DESCRIPTION • Industry’s first TotalCMOS PLD - both CM OS design and process technologies The PZ5032 CPLD Com plex Program mable Logic Device is the first in a fam ily of Fast Zero Power (FZP™) CPLDs from Philips |
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pz5032erase/prog5032tqfp44ot376-1+1 | |
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Contextual Info: INTEGRATED CIRCUITS PZ3032A/PZ3032D 32 macrocell CPLD with enhanced clocking Preliminary specification 1998 Jul 20 IC27 Data Handbook Philips Semiconductors PHILIPS Philips Sem iconductors Prelim inary specification 32 macrocell CPLD with enhanced clocking |
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pz3032a/pz3032d | |
Power and Industrial SemiconductorsContextual Info: Philips Semiconductors Product specification 64 macrocell CPLD PZ3064 FEATURES DESCRIPTION • Industry’s first TotalCMOS PLD - both CMOS design and process technologies The PZ3064 CPLD Complex Programmable Logic Device is the second in a family of Fast Zero Power (FZP™) CPLDs from Philips |
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pz306450mhz19951c44-pin+4 | |
1893 Flip-Flop
Abstract: PZ506410A84
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pz506450mhz19951c44-pin+5 | |
signal path designerContextual Info: FINAL COM’L: -10 PALLV16V8-10 Advanced Micro Devices Low-Voltage 20-Pin EE CMOS Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3 V JEDEC compatible ■ Programmable output polarity — Vcc = +3.0 V to +3.6 V ■ Pin and function compatible with all 20-pin |
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pallv16v8-1020-pinpal16r8pal10h8+1 | |
PAL 007 E
Abstract: PAL 007 c PAL 007 B pal 007 PZ5032-10BC pal 002 PAL 007 A PZ3032 PZ5032 PZ5032-10A44
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pz503250mhzot376-1pal 007 e+8 | |
pal 002
Abstract: philips tea 1090 PZ3128 PZ5128 PZ5128-S10A84 PZ5128-S10BB1 PZ5128-S10BP PZ5128-S12A84 PZ5128-S12BB1 PZ5128-S12BP
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ot322-2m0112dd1pal 002philips tea 1090+8 | |
PAL 007 E
Abstract: PAL 007 B PAL 007 A pal 002 pal 007 PAL 007 c PAL 007 diagrams PZ3032 PZ3032-10A44 PZ3032-12A44
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pz303250mhzot376-1pal 007 e+8 | |
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Contextual Info: INTEGRATED CIRCUITS m m s ^ e eI It Xilinx has acquired the entire Philips CoolRunrter Low Power CPLD Product Family, For more technical or sales informatiorij please see: www.xilinx.com XCR3032C 32 macrocell CPLD with enhanced clocking Product specification |
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xcr3032cot376-1 | |