55755B Search Results

PAL26V16

Abstract: teradyne lasar
Contextual Info: FINAL COM’L: -15/20 IND: -18/24 Z I Advanced Micro Devices M A C H 1 3 0 - 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 84 Pins ■ 64 Outputs ■ 64 Macrocells ■ 64 Flip-flops; 4 clock choices ■ 15 ns tpD Commercial

aeg diode Si 11 K

Abstract: aeg diode Si 11 aeg Diode D6 aeg diode Si 11 n
Contextual Info: ADV MICRO P LA / P L E / A R R AY S It D E | 02S75EL. OOSTMST Û T-46-13-47 Zero Power CMOS Hard Array Logic ZHAL 24A Series Features/Benefits Ordering information • Zero standby power PART NUM BER • Low power operation PACKAGE • High-speed C M O S technology

Contextual Info: COM’L: -5/7/B/B-2/A, 10/2 MIL: -10/12/15/B/A Advanced Micro Devices PAL20R8 Family 24-Pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • As fast as 5 ns maximum propagation delay ■ Power-up reset for initialization ■ Popular 24-pin architectures: 20L8,20R8,

Contextual Info: COM’L: -15/20, Q-25 MACH435-15/20, Q-25 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 84 Pins in PLCC ■ Up to 20 product terms per function, with XOR ■ 128 Macrocells ■ Flexible clocking ■ l5nstpD

Contextual Info: FINAL COM’L: -12/15/20 IND: -18/24 a Advanced Micro Devices M A C H 1 2 0 -1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 68 Pins ■ 56 Inputs ■ 48 Macrocells ■ 48 Outputs ■ 12 ns tPDCommercial 18 ns tpD Industrial

MACH210

Contextual Info: FINAL COM’L: -7/10/12/15/20, Q-12/15/20 a IND: -12/14/18/24 MACH21OA-7/10/12 MACH210-12/15/20 MACH210AQ-12/15/20 Advanced Micro Devices High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ Peripheral Component Interconnect PCI

Contextual Info: COM’L: H-15/25 MIL: H-20 Advanced Micro Devices PALCE610 Family EE CMOS High Performance Programmable Array Logic DISTINCTIVE CHARACTERISTICS • AMD’s Programmable Array Logic PAL architecture Asynchronous clocking via product term or bank register clocking from external pins

Contextual Info: FINAL COM’L: -12/15/20 IND: -18/24 il M ACHLV210-12/15/20 Advanced Micro Devices High Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3-V JEDEC compatible - ■ 83.3 MHz fcNT ■ 38 Bus-Friendly Inputs Vcc = +3.0 V to +3.6 V

gg3b

Contextual Info: FINAL COM’L: -15/20 ZI Advanced Micro Devices MACH355-15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 144 Pins in PQFP ■ JTAG, 5-V, in-circult programmable ■ IEEE 1149.1 JTAG testing capability ■ 96 Macrocells ■ 15 ns tpD