Q25752B Search Results

PAL26V16

Abstract: teradyne lasar
Contextual Info: FINAL COM’L: -15/20 IND: -18/24 Z I Advanced Micro Devices M A C H 1 3 0 - 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 84 Pins ■ 64 Outputs ■ 64 Macrocells ■ 64 Flip-flops; 4 clock choices ■ 15 ns tpD Commercial

Contextual Info: FINAL COM’L: -7.5/10/12/15/20 a Advanced Micro Devices M A C H 1 3 1 -7 / 1 0 / 1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • ■ ■ ■ ■ Programmable power-down mode 64 Outputs 64 Flip-flops; 4 clock choices

Contextual Info: CO M ’L: -5/7.5/10/12/15/20 M A C H 1 11 -5 /7 /1 0 /1 2 /1 5 /2 0 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ Program m able power-down mode ■ 32 M acrocells ■ ■ 5 ns tpD ■ 32 Flip-flops; 4 clock choices

PAL16l8 MMI

Abstract: PAL16LA OO3A MARKING PAL 006A pal 007a PLA 16L8 PAL16L8 programming algorithm IC PALCE16 mmi pla programmer reference guide pal 005a
Contextual Info: ADV HICRO PLA/PLE/ARRAYS C O M ’L 2flE 0aS7S2b D OGa^Mb- M IL P A L 1 6 R 8 il \ T -4 6 —1 9 -1 3 Am>a 5 Advanced Micro Devices F a m i l y 20-pin TTL P rogram m able Array Logic DISTINCTIVE CHARACTERISTICS • As fast as 7.5 ns maximum propagation delay

Contextual Info: COM’L: -10/12/15/20 IND: -14/18/24 M A C H 2 2 0 -1 0 /1 2 /1 5 /2 0 High-Density EE CMOS Programmable Logic a Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 68 Pins ■ 48 Outputs ■ 96 Macrocells ■ 96 Flip-flops; 4 clock choices ■ 10nstpD

Contextual Info: COM’L: -12/15/20 IND: -14/18/24 M A C H 2 1 5 -1 2 /1 5 /2 0 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins 38 Inputs with pull-up resistors ■ 32 Output Macrocells 32 Outputs ■ 32 Input Macrocells

Contextual Info: Advanced Micro Devices MACH220-10 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 68 Pins ■ 48 Outputs ■ 96 Macrocells ■ 96 Flip-flops; 4 clock choices ■ ■ 8 PAL blocks with buried macrocells 10 ns tPD ■ ■ 80 MHz fMAx external

Contextual Info: COM’L: -10 & Advanced Micro Devices P A L L V 1 6 V 8 - 1 0 Low-Voltage 20-Pin EE CMOS Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS Low-voltage operation, 3.3 V JEOEC compatible • Programmable output polarity — Vcc = +3.0 V to +3.6 V

PALCE16VQ-25

Abstract: palce16v8 programming guide palce16v8h20
Contextual Info: COM’L: H-5/7/10/15/25,0-10/15/25 IND: H-10/15/25, Q-20/25 MIL: H-15/20/25 PALCE16V8 Family EE CMOS 20-Pin Universal Programmable Array Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Pin, function and fuse-map compatible with all 20-pin GAL devices

Contextual Info: FINAL COM’L: -15/20 IND: -18/24 MACH230-15/20 High-Density EE CMOS Programmable Logic a Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 84 Pins ■ 70 Inputs ■ 128 Macrocells ■ 64 Outputs ■ 15 ns tpD Commercial 18 ns tpD Industrial ■ 128 Flip-flops; 4 clock choices

Contextual Info: COM’L: -15/20, Q-25 MACH435-15/20, Q-25 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 84 Pins in PLCC ■ Up to 20 product terms per function, with XOR ■ 128 Macrocells ■ Flexible clocking ■ l5nstpD

Contextual Info: CO M 'L: H-25 Advanced Micro Devices PALCE29MA16H-25 24-Pin EE CMOS Programmable Array Logic DISTINCTIVE CHARACTERISTICS • H igh-perform ance sem icustom logic replacem ent; E lectrically Erasable EE technology allow s reprogram m ability ■ 16 bidirectional user-program m able I/O logic

Contextual Info: FINAL COM’L: -15/20, Q-25 a MACH435-15/20, Q-25 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 84 Pins in PLCC ■ Up to 20 product terms per function, with XOR ■ 128 Macrocells ■ Flexible clocking ■ 15nstpo

mach445 family amd

Abstract: ati mach
Contextual Info: FINAL COM’L: -12 a MACH445-12 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 100-pin version of the MACH435 in P Q F P Up to 20 product terms per function, with XOR ■ JTAG, 5-V, in-circuit programmable Flexible clocking

Contextual Info: COM’L : -10/15/20 IN D :-18/24 M A C H 2 3 0 - 1 0 /1 5 /2 0 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 8 4 P ins ■ 6 4 O u tp u ts ■ 12 8 M a cro cells ■ 128 F lip -flo p s ; 4 c lo c k ch o ic e s

Contextual Info: P R E L IM IN A R Y CO M ’L: -7/10/12/15/20 MACH221 -7/10/12/15/20 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 68 Pins ■ 96 M acrocells ■ 7.5 ns tpD ■ ■ 133 M Hz fcNT ■ 56 Bus-Friendly Inputs ■

Contextual Info: COM’L: -7.5/10/12/15/20 M A C H 2 3 1 -7 /1 0 /1 2 /1 5 /2 0 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 84 Pins ■ Program m able power-down mode ■ 128 Macrocells ■ 64 Outputs ■ 7.5 ns tpo ■ 128 Flip-flops; 4 clock choices

gg3b

Contextual Info: FINAL COM’L: -15/20 ZI Advanced Micro Devices MACH355-15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 144 Pins in PQFP ■ JTAG, 5-V, in-circult programmable ■ IEEE 1149.1 JTAG testing capability ■ 96 Macrocells ■ 15 ns tpD