THP1 Search Results

t1p147

Abstract: tip 147 TRANSISTOR TIP14S TJP146 TIP146 TIP147
Contextual Info: THP145, TJP146, TIP147 PNP SILICON POWER DARL1NGTONS Copyright <0 1997. Power Innovations UmHed, UK_ • D ECEM B ER 1871 •REVISED M ARCH 1997 Designed for Complementary Use with TIP140, TIP141 and TIPI 42 • 125 W at 25°C Case Temperature

Contextual Info: CH7013B-G Chrontel CHRONTEL CHRONTEL CHRONTEL Digital PC to TV Encoder 1. FEATURES 2. GENERAL DESCRIPTION • Universal digital interface accepts YCrCb CCIR601 or 656 or RGB (15, 16 or 24-bit) video data in both non-interlaced and interlaced formats • True scale rendering engine supports underscan

Contextual Info: CH7013B Chrontel CHRONTEL CHRONTEL CHRONTEL Digital PC to TV Encoder 1. FEATURES 2. GENERAL DESCRIPTION • Universal digital interface accepts YCrCb CCIR601 or 656 or RGB (15, 16 or 24-bit) video data in both non-interlaced and interlaced formats • True scale rendering engine supports underscan

DDR200

Abstract: DDR266A DDR266B IBMN612404GT3B IBMN612804GT3B IBMN62540 IBMN62580 128MB PC266
Contextual Info: IBMN612404GT3B IBMN612804GT3B 128Mb Double Data Rate Synchronous DRAM Preliminary Features CAS Latency and Frequency CAS Latency 2 2.5 Maximum Operating Frequency MHz * DDR266A (7N) DDR266B (75N) DDR200 (8N) 133 143 100 133 100 125 * Values are nominal (exact tCK should be used).

NT5DS8M16FS-5T

Abstract: NT5DS8M16FS-6K NT5DS8
Contextual Info: NT5DS8M16FT NT5DS8M16FS 128Mb DDR SDRAM Features • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Burst lengths: 2, 4, or 8 • CAS Latency: 2 & 2.5 for 6K, 2, 2.5, & 3 for 5T

Nanya nt5ds8m16fs

Abstract: NT5DS8M16FS NT5DS8M16FT-5TI NT5DS8M16FS-5T DDR333 DDR400 NT5DS8M16 NT5DS8M16FT-6KI NT5DS8M16FT
Contextual Info: NT5DS8M16FT-5TI NT5DS8M16FS-5TI NT5DS8M16FT-6KI NT5DS8M16FS-6KI 128Mb DDR SDRAM Features • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Burst lengths: 2, 4, or 8

NT5DS8M16FS-5T

Abstract: NT5DS8M16FS-6K NT5DS8M16 NT5DS8M16FS
Contextual Info: NT5DS8M16FT NT5DS8M16FS 128Mb DDR SDRAM Features • DLL aligns DQ and DQS transitions with CK transitions • Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS • Burst lengths: 2, 4, or 8 • CAS Latency: 2 & 2.5 for 6K, 2, 2.5, & 3 for 5T

NT5DS16M16BF-6K

Abstract: NT5DS32M8BT NT5DS16M16BT-6K NT5DS16M16BT NT5DS64M4BT NT5DS32M
Contextual Info: NT5DS64M4BT NT5DS32M8BT NT5DS16M16BT NT5DS64M4BF NT5DS32M8BF NT5DS16M16BF NT5DS64M4BS NT5DS32M8BS NT5DS16M16BS NT5DS64M4BG NT5DS32M8BG NT5DS16M16BG 256Mb DDR SDRAM Features • Data mask DM for write data • DLL aligns DQ and DQS transitions with CK transitions

DDR200

Abstract: DDR266A DDR266B IBMN62540 IBMN625404GT3B IBMN62580 IBMN625804GT3B
Contextual Info: IBMN625404GT3B IBMN625804GT3B 256Mb Double Data Rate Synchronous DRAM Preliminary Features CAS Latency and Frequency CAS Latency Maximum Operating Frequency MHz * DDR266A (7N) DDR266B (75N) DDR200 (8N) 133 143 100 133 100 125 2 2.5 * Values are nominal (exact tCK should be used).

MH32D64AKQJ-75

Contextual Info: Preliminary Spec. MITSUBISHI LSIs Some contents are subject to change without notice. MH32D64AKQJ-75,-10 2,147,483,684-BIT 33,554,432-WORD BY 64-BIT Double Data Rate Synchronous DRAM Module DESCRIPTION The MH32D64AKQJ is 33554432 - word x 64-bit Double Data Rate(DDR) Sy nchronous DRAM mounted module.

MT47H128M8CF-25

Abstract: 8 resistor array 10k smd 103
Contextual Info: 1Gb: x8, x16 Automotive DDR2 SDRAM Features Automotive DDR2 SDRAM MT47H128M8 – 16 Meg x 8 x 8 banks MT47H64M16 – 8 Meg x 16 x 8 banks Options1 Features • • • • • • • • • • • • • • • • • • • Marking • Configuration

MH64D72KLH-10

Abstract: MH64D72KLH-75
Contextual Info: Preliminary Spec. MITSUBISHI LSIs Some contents are subject to change without notice. MH64D72KLH-75,-10 4,831,838,208-BIT 67,108,864-WORD BY 72-BIT Double Data Rate Synchronous DRAM Module DESCRIPTION The MH64D72KLH is 67108864 - word x 72-bit Double Data Rate(DDR) Sy nchronous DRAM mounted module.

M2S56D20

Abstract: M2S56D20AKT M2S56D30AKT M2S56D40AKT
Contextual Info: DDR SDRAM Rev.1.0 MITSUBISHI LSIs M2S56D20/ 30/ 40AKT Jul. '01 Preliminary 256M Double Data Rate Synchronous DRAM PRELIMINARY Some of contents are subject to change without notice. DESCRIPTION M2S56D20AKT is a 4-bank x 16,777,216-word x 4-bit, M2S56D30AKT is a 4-bank x 8,388,608-word x 8-bit,

bq 8050

Abstract: 614k R33h 1838 ir receiver SE 7889 ic 8050
Contextual Info: ePG3231 RISC II-2G Series Microcontroller Product Specification DOC. VERSION 2.5 ELAN MICROELECTRONICS CORP. November 2005 Trademark Acknowledgments: IBM is a registered trademark and PS/2 is a trademark of IBM Windows is a trademark of Microsoft Corporation

W942504AH

Abstract: W942508AH W942516AH
Contextual Info: Preliminary W942504AH 16M x 4 BANKS × 4 BIT DDR SDRAM Table of Contents1. GENERAL DESCRIPTION .3 2. FEATURES .3

A1833

Contextual Info: Advance‡ 2Gb: x16, x32 Mobile LPDDR SDRAM Features Mobile Low-Power DDR SDRAM MT46H128M16LF – 32 Meg x 16 x 4 banks MT46H256M16L2 – 32 Meg x 16 x 4 banks x 2 MT46H64M32LF – 16 Meg x 32 x 4 banks MT46H128M32L2 – 16 Meg x 32 x 4 banks x 2 MT46H256M32L4 – 16 Meg x 32 x 4 banks x 4

Contextual Info: 2Gb: x8, x16 Automotive DDR2 SDRAM Features Automotive DDR2 SDRAM MT47H256M8 – 32 Meg x 8 x 8 banks MT47H128M16 – 16 Meg x 16 x 8 banks Options1 Features • • • • • • • • • • • • • • • • • • • • Marking • Configuration

MT47H32M16 DATA SHEET

Abstract: DDR2 16 meg x16 industrial old file for mt47h32m16 Theta JC of FBGA DDR2-400 DDR2-533 DDR2-667 DDR2-800 MT47H32M16 MT47H64M8
Contextual Info: 512Mb: x4, x8, x16 DDR2 SDRAM Features DDR2 SDRAM MT47H128M4 – 32 Meg x 4 x 4 banks MT47H64M8 – 16 Meg x 8 x 4 banks MT47H32M16 – 8 Meg x 16 x 4 banks Options1 Features • • • • • • • • • • • • • • • • • • • Configuration

MT46H64M16

Abstract: 6S55 MT46H64M16LF
Contextual Info: 1Gb: x16, x32 Mobile LPDDR SDRAM Features Mobile Low-Power DDR SDRAM MT46H64M16LF – 16 Meg x 16 x 4 Banks MT46H32M32LF – 8 Meg x 32 x 4 Banks Features Options • Vdd/Vddq – 1.8V/1.8V • Configuration – 64 Meg x 16 16 Meg x 16 x 4 banks – 32 Meg x 32 (8 Meg x 32 x 4 banks)

CK1519

Contextual Info: 256Mb: x8, x16 Automotive DDR SDRAM Features Automotive DDR SDRAM MT46V32M8 – 8 Meg x 8 x 4 banks MT46V16M16 – 4 Meg x 16 x 4 banks Features Options • VDD = 2.5V ±0.2V, VDDQ = 2.5V ±0.2V VDD = 2.6V ±0.1V, VDDQ = 2.6V ±0.1V DDR400 1 • Bidirectional data strobe (DQS) transmitted/

s11 stopping compound

Abstract: DEF01
Contextual Info: 128Mb: x16, x32 Mobile DDR SDRAM Features Mobile DDR SDRAM MT46H8M16LF – 2 Meg x 16 x 4 banks MT46H4M32LF – 1 Meg x 32 x 4 banks Features Options • VDD/VDDQ = 1.70–1.95V • Bidirectional data strobe per byte of data DQS • Internal, pipelined double data rate (DDR)

09005aef82f1e6e2

Contextual Info: 512Mb: x4, x8, x16 DDR2 SDRAM Features DDR2 SDRAM MT47H128M4 – 32 Meg x 4 x 4 banks MT47H64M8 – 16 Meg x 8 x 4 banks MT47H32M16 – 8 Meg x 16 x 4 banks Options1 Features • • • • • • • • • • • • • • • • • • • Configuration

CCIR601

Abstract: CCIR656 CH7004C CH7013A 1429 a
Contextual Info: CH7004C Chrontel CHRONTEL CHRONTEL CHRONTEL Digital PC to TV Encoder with MacrovisionTM 1. FEATURES • • • • • • • • • • • • • • • • • 2. GENERAL DESCRIPTION TM Supports Macrovision 7.X anti-copy protection Pin and function compatible with CH7003 / CH7013A

MT46H128M16

Abstract: MT46H128M16LF MT46H64M32LF MT46H128 MT46H128M32L2 MT46H256M32 MT46H64M32 MT46H128M MT46H128M16L 240-ball
Contextual Info: 2Gb: x16, x32 Mobile LPDDR SDRAM Features Mobile Low-Power DDR SDRAM MT46H128M16LF – 32 Meg x 16 x 4 Banks MT46H64M32LF – 16 Meg x 32 x 4 Banks MT46H128M32L2 – 16 Meg x 32 x 4 Banks x 2 MT46H256M32L4 – 32 Meg x 16 x 4 Banks x 4 MT46H256M32R4 - 32 Meg x 16 x 4 Banks x 4