N381 Search Results

FC 0137

Abstract: cb3 19
Contextual Info: << INVERTER Vin vs. Vout IC : M38102M4 CHARACTERISTICS >> Vdd : S CV1 Vout [V] Vin [V] << INVERTER GAIN/PHASE vs. IC : N38102H4 Ft - 9.3 [MHz] FREQUENCY CHARACTERISTICS >> Vdd : 5 [V] P.M - 110.9 [degl Freq. [MHz] -> 0 [dB] füíHSJÍSSl M38102M4 - 1 FCR3.58MC5

Contextual Info: Panasonic Other MOS LSIs N3814, N3814S NTSC CCD Video Signal Delay Elements • Overview ■ Pin Assignment The M N 3814 and M N3814S are 4 fsc CM OS CCD signal delay elem ents w hose wide bandw idth and low noise make them ideal for video signal processing applications.

13 sp

Abstract: ASP-22529
Contextual Info: ASP—22529. 200 NOTES: +' 2 POS x .100 1. FILL FIRST ROW WITH T - 1 S 6 - 2 4 - S - 2 AND SECOND ROW WITH A S P - 7 0 8 2 3 - 0 2 - S - S . .0 5 0 REF - 2. <C> REPRESENTS A CRITICAL DIMENSION. 3. PARTS TO BE BULK PACKAGED .7 9 0 REF .100 REF .2 0 0 REF

diode T25-4

Abstract: IC AN214 N345 pioneer amplifier an214 XCV1600E ac3 amplifier circuit diagram AN214 amplifier horizontal driver transistor D155 K235 XCV300E-6PQ240C
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.2 November 9, 2001 Preliminary Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)

GSR 10,8

Abstract: DLL5 BG432 ic 404 BB112 equivalent
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.0 April 2, 2001 Preliminary Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 Kb to 4 Mb system gates - 130 MHz internal performance (four LUT levels)

AF125

Abstract: n345 pioneer amplifier an214 diode t25 4 d9 DIODE T25-4 AY102 AF155 AN214 amplifier horizontal driver transistor D155 IC AN214
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.3 July 17, 2002 Production Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)

XCV1000E

Abstract: AH273 AF245 diode t25 4 d9 D2641 T25-4 L9 ae3219 DS0224 t2943 T25 4 F8
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-4 v2.3 November 15, 2001 Preliminary Product Specification Virtex-E Pin Definitions Pin Name Dedicated Pin Direction GCK0, GCK1, GCK2, GCK3 Yes Input Clock input pins that connect to Global Clock Buffers.

n503

Abstract: n383 LCD N96 N349 n352 SFAA3L N555 data sheet n345 N546 N582
Contextual Info: Z-Power LED X10490 Technical Data Sheet *Customer : Specification SFAA3L CUSTOMER Checked by Approved by SUPPLIER Drawn by Approved by Rev. 1.00 December 2009 www.acriche .com www.acriche.com Document No. : SSC-QP-7-07-24 Rev.00 Z-Power LED X10490 Technical

AN214 amplifier

Abstract: pioneer amplifier an214 transistor ad161 AD161 k2642 DIODE T25-4 horizontal driver transistor D155 intel G31 circuit diagram k363 n345
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.3 July 17, 2002 Production Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)

transistor 2N4

Abstract: ST25C transistor 2N407 transistor 2SA114 TFK 808 transistor 2sc124 SF1222 GE2 TRANSISTOR TFK 877 TFK 748
Contextual Info: $ 1.50 2 -H 2 1 $ % Cat. No. SSH-5 ^TRANSISTOR SUBSTITUTION HANDBOOK by The Howard W. Sams Engineering Staff HOWARD W. SAMS & CO., INC. THE BOBBS-MERRILL COMPANY, INC. Indianapolis • New York i FIFTH EDITION FIRST PRINTING — JANUARY, 1964 FIRST EDITION

XCV1600E

Abstract: XCV2000E K251 AF125 j281 K235 pioneer amplifier an214 DS022-1 XCV1000E XCV100E
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.2 November 9, 2001 Preliminary Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)

K2466

Abstract: H1342 AU61
Contextual Info: 901592 Virtex -E 1.8 V Field Programmable Gate Arrays R DS022 v1.5 July 10, 2000 3* Features Preliminary Product Specification High-performance Built-in Clock Management Circuitry - Eight fully digital Delay-Locked Loops (DLLs) • Fast, High-density 1.8 V FPGA Family

A21n

Abstract: digital dice design VHDL k41 dob Quadrature Decoder Interface ICs
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022 v1.9 February 12, 2001 Preliminary Product Specification Features • • • • High-Performance Built-In Clock Management Circuitry Densities from 58 Kb to 4 Mb system gates - Eight fully digital Delay-Locked Loops (DLLs)

Contextual Info: NICHIA STS-DA1-1541A <Cat.No.110318> N I CH I A CORPORATI ON SPECI FI CATI ON S FOR LED N H SB0 4 6 T- N 3 Pb-free Reflow Soldering Application Built-in ESD Protection Device RoHS Compliant NICHIA STS-DA1-1541A <Cat.No.110318> SPECIFICATIONS 1 Absolute Maximum Ratings

K363 equivalent

Abstract: n345 AF125 XCV1000E d30122 A281 horizontal driver transistor D155 AY102 j281 pioneer amplifier an214
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022 v1.7 September 20, 2000 Preliminary Product Specification Features • • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)

P1152

Abstract: ae301 xcv400e XCV100E XCV200E XCV300E XCV1000E XCV1600E XCV600E FG676
Contextual Info: R Virtex-E Pin Definitions Pin Name Dedicated Pin Direction Description GCK0, GCK1, GCK2, GCK3 Yes Input Clock input pins that connect to Global Clock Buffers. These pins become user inputs when not needed for clocks. M0, M1, M2 Yes Input Mode pins are used to specify the configuration mode.

transistor c2060

Abstract: Transistor Shortform Datasheet & Cross References 1N4465 C1906 transistor Germanium itt 3N58 IN939 MC1230F 2N3866 MOTOROLA C943 transistor
Contextual Info: Data Book Updating Service I Table of Contents How to Use the Data Book I > INTRODUCTION Complete I N . . . INDEX numerical index o f all ElA-registered device types, with major electrical specifications 2N . . . & 3N . . . INDEX Complete numerical index of all ElA-registered device types,

g4aoo

Abstract: XCV1000E CG1156
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.0 April 2, 2001 Preliminary Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 Kb to 4 Mb system gates - 130 MHz internal performance (four LUT levels)

3802A

Abstract: mn3801 mn3106 N8033 MN3801S 8028A N3801 N3858 N3802 mn8040
Contextual Info: MOS LSIs • CCD Delay Line Series 1 Category Type No. Clock System Stages Frequency Signal Area ( —3dB) COM Depth Quasi­ single power supply 5V, (6V) Supply voltage N M s 5V Supply voltage 12V Quasi­ single power supply 5V. (9V) Low EMI Low clock noise

63B29

Abstract: pioneer amplifier an214 H336 transistor tt 2222 AF125 XCV1600E AN214 AN214 amplifier bb244 diode t25 4 F6
Contextual Info: 901592 Virtex -E 1.8 V Field Programmable Gate Arrays R DS022 v1.3 February 29, 2000 3* Features Advance Product Specification • High-performance Built-in Clock Management Circuitry - Eight fully digital Delay-Locked Loops (DLLs) • Fast, High-density 1.8 V FPGA Family

krone n355

Abstract: n1076 n410 ab N1106 N346 AB N117 N1165 n1213 n1211 N906
Contextual Info: PRISLISTA NEUTRIK Gäller från 2004-06-01 Kontakter i bulkpack -D säljs endast vid order om 1000 enheter och levereas i praktisk plockbox med 100st i varje. Vissa kontakter är ej lagervara och kräver minikvantitet I slutet finner du de senaste prisändringarna

diode T25-4

Abstract: T25-4 L9 K363 equivalent T25-4 d92 02 ad254 AF514 A241 AF125 AN214
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-4 v2.5 March 14, 2003 Production Product Specification Virtex-E Pin Definitions Pin Name Dedicated Pin Direction GCK0, GCK1, GCK2, GCK3 Yes Input Clock input pins that connect to Global Clock Buffers.

M1661p

Abstract: m1261 M2515180 m1661 M201-20 Pg9, Pg11, Pg13.5, Pg16, Pg21, Pg29 M2511 M1208060 N12121W M2518
Contextual Info: Wires Accessories 1- Cable Glands PG series Metric type screw thread Thread Material:PA Seal piece:NBR & EPDM • Protection class to:IP68 tighten part , with O-seal ring ■ Temperature range: static state-40℃to 100℃ , short time to 120℃ motion state -20℃ to 80℃,

AD161

Abstract: pioneer amplifier an214 XCV600E buffer register vhdl XCV1000E AN214 amplifier j281 MB 300E TT 2222 Horizontal Output Transistor pins out XCV400E
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.3 July 17, 2002 Production Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)