DS0224 Search Results

SR52 W 18

Abstract: GR-253-CORE GR-499-CORE PR11 T7690 T7698 uig823
Contextual Info: a e re 8 AdLib OCR Evaluation systems Data Sheet September 2002 T7698 Quad T1/E1 Line Interface and Octal T1/E1 Monitor Features . Integrated quad T1/E1 line interface and octal T1/ El receive frame monitor with HDLC processor provides system QoS capabilities .

sis 968

Abstract: vhdl code for complex multiplication and addition 200E 300E 400E 600E PCI33 3 bit right left shift register verilog vHDL prog
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-2 v2.3 November 9, 2001 Preliminary Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array, shown in Figure 1, comprises two major configurable elements: configurable logic blocks (CLBs) and input/output blocks (IOBs).

diode T25-4

Abstract: IC AN214 N345 pioneer amplifier an214 XCV1600E ac3 amplifier circuit diagram AN214 amplifier horizontal driver transistor D155 K235 XCV300E-6PQ240C
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.2 November 9, 2001 Preliminary Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)

Field Programmable Gate Arrays

Abstract: DS022-1 XCV1000E XCV100E MB 300E FPGA Virtex 6 pin configuration XCV1600E XCV2000E XCV200E XCV300E
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.3 July 17, 2002 Production Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)

GSR 10,8

Abstract: DLL5 BG432 ic 404 BB112 equivalent
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.0 April 2, 2001 Preliminary Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 Kb to 4 Mb system gates - 130 MHz internal performance (four LUT levels)

XCV100E

Abstract: XCV200E XCV1600E
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-3 v2.9 September 10, 2002 Production Product Specification Virtex-E Electrical Characteristics Definition of Terms Electrical and switching characteristics are specified on a per-speed-grade basis and can be designated as Advance,

AF125

Abstract: n345 pioneer amplifier an214 diode t25 4 d9 DIODE T25-4 AY102 AF155 AN214 amplifier horizontal driver transistor D155 IC AN214
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.3 July 17, 2002 Production Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)

XCV200E

Abstract: XCV2000E XCV600E XCV100E XCV1600E XCV400E XCV1000E XCV2600E XCV300E XCV50E
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-3 v2.6 November 9, 2001 Preliminary Product Specification Virtex-E Electrical Characteristics Definition of Terms Electrical and switching characteristics are specified on a per-speed-grade basis and can be designated as Advance,

XCV1000E

Abstract: AH273 AF245 diode t25 4 d9 D2641 T25-4 L9 ae3219 DS0224 t2943 T25 4 F8
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-4 v2.3 November 15, 2001 Preliminary Product Specification Virtex-E Pin Definitions Pin Name Dedicated Pin Direction GCK0, GCK1, GCK2, GCK3 Yes Input Clock input pins that connect to Global Clock Buffers.

48-pin TSOP (I) flash memory

Abstract: am29lv Am29LV320D application mpm h1 a20 g6 amd CS144 XCV50E AMD 2m flash memory FPGA Virtex 6 pin configuration XC17V00
Contextual Info: ds088_1_1.fm Page 1 Wednesday, June 19, 2002 5:31 PM R DS088 v1.2 June 7, 2002 System ACE SC Solution Advance Product Specification Summary • • • • • • • System-level, high-capacity, pre-configured solution for Virtex Series FPGAs, Virtex-II Series Platform

f 4556

Abstract: GR-253-CORE GR-499-CORE T7690 T7698 SR52 W 18
Contextual Info: Data Sheet September 2002 T7698 Quad T1/E1 Line Interface and Octal T1/E1 Monitor Features • Integrated quad T1/E1 line interface and octal T1/ E1 receive frame monitor with HDLC processor provides system QoS capabilities. ■ ■ ■ ■ Hardware and software reset options.

tf2d

Abstract: GR-253-CORE REF10 TMPR28051 TMUX03155
Contextual Info: Preliminary Data Sheet May 2002 TMUX03155 STS-3/STM-1 AU-4 Multiplexer/Demultiplexer Features • Multiplexes three STS-1 signals into a SONET STS-3 signal. ■ Multiplexes three AU-3 signals into an SDH STM-1 (AU-4) signal via a TUG-3 construction. ■

GR-253

Abstract: TRCV0110G TRCV0110G-3-XE APD-SBSC-101
Contextual Info: Data Sheet June 7, 2002 TRCV0110G 10 Gbits/s Limiting Amplifier Clock Recovery, 1:16 Data Demultiplexer Features • ■ ■ Integrated limiting amplifier with 7.5 mV sensitivity at 1e-10 bit error rate BER Integrated clock recovery and 1:16 data demultiplexer (deMUX)

AN214 amplifier

Abstract: pioneer amplifier an214 transistor ad161 AD161 k2642 DIODE T25-4 horizontal driver transistor D155 intel G31 circuit diagram k363 n345
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.3 July 17, 2002 Production Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)

2795C

Abstract: Digital Alarm Clock by ttl dis 5261 b f 4556 GR-253-CORE GR-499-CORE T7690 T7698 lucent dacs ii
Contextual Info: Data Sheet May 2002 T7698 Quad T1/E1 Line Interface and Octal T1/E1 Monitor Features • ■ ■ ■ ■ ■ ■ Integrated quad T1/E1 line interface and octal T1/ E1 receive frame monitor with HDLC processor provides system QoS capabilities. Hardware and software reset options.

XCV100E

Abstract: XCV1600E
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-3 v2.8 July 17, 2002 Production Product Specification Virtex-E Electrical Characteristics Definition of Terms Electrical and switching characteristics are specified on a per-speed-grade basis and can be designated as Advance,

AMD 2m flash memory

Abstract: XCV50E CS144 SelectMAP 48-pin TSOP (I) flash memory am29lv FPGA Virtex 6 pin configuration uAM29LV160DT AM29LV320DB90 AM29LV320DT90
Contextual Info: ds088_05.fm Page 1 Monday, September 24, 2001 3:35 PM R DS088 v1.0 September 25, 2001 System ACE SC Solution Advance Product Specification Summary of Features • • • • • • • System-level, high-capacity, pre-configured solution for Virtex and Spartan® FPGAs

EC60825-1

Abstract: EC60825 TD1611 STM-16 TD16L1 agilent receiver OC-48 1EC60825-1 transmitter agilent oc 192 agere 840 demultiplexer outline
Contextual Info: a8e re AdLib OCR Evaluation systems Advance Data Sheet May 2002 TD16-Type 2.5 Gbits/s Transponder with 16-Channel 155 Mbits/s Multiplexer/Demultiplexer Description The TD16-type transponder performs straightforward, bit-level parallel-to-serial converting in the

RBS 2202

Abstract: 2202 bts diode S4 68a T7630 SA5-27 TND 027 YM SA4-13 f 4556 PR70 Lucent SLC 2000
Contextual Info: Preliminary Data Sheet May 2002 T7630 Dual T1/E1 5.0 V Short-Haul Terminator Terminator-II Features • The T7630 Dual T1/E1 Terminator consists of two independent, highly integrated, software-configurable, full-featured short-haul transceiver/framers. The T7630 provides glueless interconnection from a

TT 2222 Horizontal Output Transistor pins out

Abstract: transistor tt 2222 TT 2222 Horizontal Output voltage TT 2222 tt 2222 Datasheet DS022-2 sis 968 verilog code for lvds driver vhdl code for complex multiplication and addition 200E
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-2 v2.6.1 June 15, 2004 Production Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array, shown in Figure 1, comprises two major configurable elements: configurable logic blocks (CLBs) and input/output blocks (IOBs).

Interfacing and Matrix Keyboard 8085

Abstract: basics of 8085 microprocessor AM188 i7 motherboard csc 2314 3x4 keyboard Am486 keyboard matrix 18*8 traffic light controls using 8085 MA12
Contextual Info: ÉlanSC400 and ÉlanSC410 Microcontrollers User’s Manual 1997 Advanced Micro Devices, Inc. All rights reserved. Advanced Micro Devices, Inc. “AMD” reserves the right to make changes in its products without notice in order to improve design or performance

RBS 2202

Abstract: f 4556 THS24 PR21 T7630 T7633 SA517 805 T42 RFDC
Contextual Info: Device Advisory September 1999 T7633 Device Advisory for Version 1.0 of the Device Introduction This advisory applies to the T7633 Dual T1/E1 3.3 V Short-Haul Terminator as described in the May 1998 T7633 Dual T1/E1 3.3 V Short-Haul Terminator Advance Data Sheet DS98-244TIC .

sis 968

Abstract: 200E 300E 400E 600E LVCMOS25 PCI33
Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-2 v2.8 January 16, 2006 Production Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array, shown in Figure 1, comprises two major configurable elements: configurable logic blocks (CLBs) and input/output blocks (IOBs).

Contextual Info: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-2 v2.5 September 10, 2002 Production Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array, shown in Figure 1, comprises two major configurable elements: configurable logic blocks (CLBs) and input/output blocks (IOBs).