MD55 Search Results

7sa10

Abstract: SA1015 SA1115 SD314
Contextual Info: 1 A B C D 2 SIGNAL NAME SHEET NO. = MD47 3,5 MD48 3,5 MD49 3,5 MD5 3,5 MD50 3,5 MD51 3,5 MD52 3,5 MD53 3,5 MD54 3,5 MD55 3,5 -MD56 3,5 MD57 3,5 MD58 3,5

MDA55

Abstract: MFC55
Contextual Info: MDC55 MDA55 MDK55 MD55 Diode Modules Features： n Isolated mounting base 2500V~ Pressure contact technology with Increased power cycling capability n Space and weight savings Typical Applications n AC/DC Motor drives n Various rectifiers n DC supply for PWM inverter

md55

Abstract: MDA55 max5586 mdc55 MDK55
Contextual Info: MDC55 MDA55 MDK55 MD55 Diode Modules Features： n Isolated mounting base 3600V~ Pressure contact technology with Increased power cycling capability n Space and weight savings Typical Applications n AC/DC Motor drives n Various rectifiers n DC supply for PWM inverter

MD21-MD20

Abstract: OE23 SC15064 pc motherboard schematics
Contextual Info: J b . SIERRA æMICDNDUCTOR ' v PRODUCT BRIEF FALCON/64 Integrated 64-Bit GUI Accelerator SC15064 FEATURES Graphics Acceleration (hardware based) Bus Support BitBlt • Raster operations • VESA VL-BUS Line draw • PCI Local Bus ISA BUS Pattern fill

1MD45

Abstract: cy17 High-Zt11-12 CY10 CY82C691 CY82C692 CY82C693 DQ23P cy82
Contextual Info: PRELIM INARY CY82C692 W CYPRESS Pentium hyperCache™ Chipset Data-Path Controller with Integrated Cache Features • Supports ail 3.3V Pentium™-class processors, AMD K5, K6 and Cyrix M1 CPUs • Two-bit wraparound counter supporting Intel Burst or Linear burst sequence

Contextual Info: Integrated Device Technology, Inc. 3.3V 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT IDT49C3466 ADVANCE INFORMATION FEATURES: DESCRIPTION: • 64-bit wide Flow-thruEDC • Separate System and Memory Data Input/Output Buses • — Error Detect Time: 20ns

AJ314

Abstract: usb joystick circuit diagram intel 945 crb VIP 22 A CS130 RC5 Infrared 38b A216 SC2200UFH-300 SC3200 DOC2000
Contextual Info: Geode SC2200 Thin Client On a Chip General Description The Geode™ SC2200 Thin Client On a Chip device is a member of the National Semiconductor IA Information Appliance On a Chip family of fully integrated x86 system chips. The Geode SC2200 includes:

National Semiconductor PC16550D UART

Abstract: K2687 CL-GD5465 VR5000 PC16550D R5000 VRC5074 R4311 H49-M97 CL-GD546
Contextual Info: VRC5074 System Controller June 1998 Data Sheet 1.0 Introduction 1.1 The VRC5074 System Controller is a software-configurable chip that directly connects the V R5000 CPU to SDRAM memory, a PCI Bus, and a Local Bus, without external logic or buffering. From the CPU’s viewpoint, the controller acts as a memory controller, DMA controller, PCI-Bus host bridge, and Local-Bus host bridge. From the viewpoint of PCI agents, the controller acts as master and target on the PCI Bus. The

lmc6762

Abstract: intel core i5 650 processor st 2n2222a 82371AB 82443BX 245417 intel mobile pentium III 600 650 mhz MD22 equivalent mmc-1 celeron MMC-2
Contextual Info: Celeron Processor Mobile Module: Mobile Module Connector 2 MMC-2 at 700 MHz, 650 MHz, 600 MHz, 550 MHz, 500 MHz, and 450 MHz Datasheet Product Features • ■ ■ ■ ■ ■ ■ ■ ■ Mobile Celeron processor with processor speeds of 700 MHz, 650 MHz, 600 MHz,

49C466

Contextual Info: 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT IDT49C466 IDT49C466A PRELIMINARY FEATURES: DESCRIPTION: • 64-bit wide Flow-thruEDC • Separate System and Memory Data Input/Output Buses • — Error Detect Time: 10ns — Error Correct Time: 15ns

Contextual Info: Intel. InteI/40 Graphics Accelerator Datasheet Release Date: April, 1998 Order Number: 2^06 :8-00:^ Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

MD5 pinout

Abstract: BDX 285 SD 347 stpc client STPC AD 149 AE9 SA8 357 AA23 AC11 AC13
Contextual Info: APPLICATION NOTE STPC Client Motherboard Start-Up by T. Seigneurie & M.Tabet 1. Overview. This document provides detailed information regarding the way to start-up a new STPC Client Motherboard. This document intends to eliminate basic hardware problem that prevents the

82443BX

Abstract: 443BX 82371EB PIIX4E HA21C
Contextual Info: Intel 440BX AGPset: 82443BX Host Bridge/Controller Datasheet April 1998 Order Number: 290633-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability

cs 2648

Abstract: 2648f modeling of ac dc ac boost converter chapter bosch servo module SM 10/20 723 ic internal diagram HITACHI microcontroller H8S family 2DT8 scr driver dc motor speed control 1.5 CSTN LCD bosch sm ac drive
Contextual Info: REJ09B0257-0500 The revision list can be viewed directly by clicking the title page. The revision list summarizes the locations of revisions and additions. Details should always be checked by referring to the relevant text. 16 H8S/2646 Group, H8S/2646R F-ZTAT,

PROCESSOR

Abstract: mp 9141 es dc-dc mp 9141 es CX5520 GXm-180B 2.9V 70C power module si 3101 schematic diagram Geode GXm Processor tag 8514 30054 gxm-266b
Contextual Info: Geode GXm Processor Integrated x86 Solution with MMX Support General Description The National Semiconductor Geode™ GXm processor is an advanced 32-bit x86 compatible processor offering high performance, fully accelerated 2D graphics, a 64-bit synchronous DRAM controller and a PCI bus controller,

AD11C

Abstract: MD09 IDT7M9602
Contextual Info: IDT MOBILE WINCHIP PROCESSOR MODULE ADVANCE INFORMATION IDT7M9602 Integrated Device Technology, Inc. FEATURES: • • • • • IDT W inC hip Processor technology with Internal/bus frequencies of 180/60 or 200/66 512K Secondary level cache of pipeline burst SRAM

Contextual Info: INTEL 430HX PCISET 82439HX SYSTEM CONTROLLER TXC • Supports All 3V Pentium Processors ■ Dual Processor Support ■ PCI 2.1 Com pliant ■ Integrated Second-Level Cache Controller — — — — — — — — — ■ ■ — — Direct Mapped Organization

3VF1

Abstract: 82443ZX PMB 3330 PMB 8815 intel AF 82801
Contextual Info: intei Intel 440ZX AGPset: 82443ZX Host Bridge/Controller Datasheet November 1998 Order Number: 290650-001 intei Inform ation in this docum ent is provided in connection w ith Intel products. No license, express o r im plied, by estoppel or otherwise, to a ny intellectual

82441fx

Contextual Info: PRELIMINARY intel INTEL 440FX PCISET 82441FX PCI AND MEMORY CONTROLLER PMC AND 82442FX DATA BUS ACCELERATOR (DBX) Supports the Pentium Pro Processors at Bus Frequencies Up To 66 Mhz — Supports 32-Bit Addressing — Optimized in-Order and Request Queue

G175

Abstract: 234T0 82439HX CH340
Contextual Info: INTEL 430HX PCISET 82439HX SYSTEM CONTROLLER TXC • ■ ■ ■ ■ Optional Error Checking and Correction (ECC) Supports All 3V Pentium Processors Dual Processor Support PCI 2.1 Compliant Integrated Second-Level Cache Controller — — — — — —

A26 zener

Abstract: m 3329 c1 video out pin AGP Host to PCI Bridge cdqa2 diode ZENER A26 t48 dmm X8 diode zener japan ZENER A24 zener Diode B23 440EX
Contextual Info: Intel 440EX AGPset: 82443EX PCI AGP Controller PAC Datasheet April 1998 Order Number: 290616-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability

pitch 0.4 QFP 256p

Abstract: SH-432 TWT Wiring HQFP256 MB86290A MB86292 MB86293 MB86833 V832 Hitachi DSA0079
Contextual Info: MB86293 <CORAL_LQ> Graphics Controller Specifications Revision 1.1 14th Jan, 2003 Copyright FUJITSU LIMITED 2001 ALL RIGHTS RESERVED • The specifications in this manual are subject to change without notice. Department before purchasing the product described in this manual.

Contextual Info: PRELIMINARY CY82C692 Pentium hyperCache™ Chipset Data-Path/Integrated Cache for h C -VX, h C -D X Solutions Features Two-bit wraparound counter supporting Intel Burst or Linear burst sequence Supports 3-1-1-1 Level 2 cache operation up to 66 MHz bus speed

15N3

Abstract: Hitachi DSA002720 22A72 MC134
Contextual Info: H8S/2636F-ZTATTM Hardware Manual ADE-602-189 Rev. 1.0 12/28/99 Hitachi, Ltd. Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in