LVEL33 Search Results

LV33

Abstract: AZ100LVEL33 AZ100LVEL33D AZ100LVEL33NG AZ100LVEL33T AZ10LVEL33 AZ10LVEL33D AZ10LVEL33T AZM10 MC100EL33
Contextual Info: ARIZONA MICROTEK, INC. LVEL33 LVEL33 ECL/PECL ÷4 Divider PACKAGE AVAILABILITY FEATURES • • • • • • • • PACKAGE Green / RoHS Compliant / Lead Pb Free package available Operating Range of 3.0V to 5.5V 470ps Propagation Delay 4.0GHz Toggle Frequency

KVL33

Abstract: EL33 MC100LVEL33 MC100LVEL33D
Contextual Info: LVEL33 3.3VĄECL ÷4 Divider The LVEL33 is an integrated ÷4 divider. The LVEL is functionally equivalent to the EL33 and works from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the

MC100EL92

Abstract: AN1560 EL90 SWITCH XCJC AN1503 DL140 LVEL11 LVEL16 motorola LOGIC
Contextual Info: AN1560 Application Note Low Voltage ECLinPS SPICE Modeling Kit Prepared by Cleon Petty Motorola Logic Applications Engineering ECLinPS and ECLinPS Lite are trademarks of Motorola, Inc. 6/97  Motorola, Inc. 1997 1 REV 1 AN1560 Low Voltage ECLinPS SPICE Modeling Kit

E142 wafer format

Abstract: HEL32 MR 4710 IC 300w power amplifier circuit diagram HEL05 klt22 HEL12 HEL31 HEL16 HLT22 HLT28
Contextual Info: DL140/D Rev. 6, Jan-2001 High Performance ECL Data ECLinPS and ECLinPS Lite™ High Performance ECL Device Data ECLinPS, ECLinPS Lite, and Low Voltage ECLinPS DL140/D Rev. 6, Jan–2001  SCILLC, 2001 Previous Edition  2000 “All Rights Reserved”

KVL33

Abstract: KV33
Contextual Info: LVEL33 3.3V ECL ÷4 Divider The LVEL33 is an integrated ÷4 divider. The LVEL is functionally equivalent to the EL33 and works from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the

EL33

Abstract: MC100LVEL33
Contextual Info: LVEL33 3.3V ECL ÷4 Divider Description The LVEL33 is an integrated ÷4 divider. The LVEL is functionally equivalent to the EL33 and works from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the

Contextual Info: LVEL33 3.3V ECL ÷4 Divider Description The LVEL33 is an integrated ÷4 divider. The LVEL is functionally equivalent to the EL33 and works from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the

K1213

Abstract: k1518 transistor c1213 equivalent transistor k1213 k1112 K1113 k0305 k0205 k0309 equivalent k1117
Contextual Info: AN1560/D Low Voltage ECLinPS and ECLinPS Lite SPICE Modeling Kit Prepared by Senad Lomigora and Paul Shockman ON Semiconductor Broadband Application Engineers http://onsemi.com APPLICATION NOTE Objective The objective of this kit is to extend the information given

EL33

Abstract: MC100LVEL33 AN1672D
Contextual Info: LVEL33 3.3V ECL ÷4 Divider Description The LVEL33 is an integrated ÷4 divider. The LVEL is functionally equivalent to the EL33 and works from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the

MC100LVEL33

Abstract: DL140 EL33
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA ÷4 Divider LVEL33 The LVEL33 is an integrated ÷4 divider. The differential clock inputs and the VBB allow a differential, single-ended or AC coupled interface to the device. If used, the VBB output should be bypassed to

670 OHM RESISTOR

Abstract: BD 2135 BD 650 EL33 MC100LVEL33 MC100LVEL33D
Contextual Info: LVEL33 3.3V ECL ÷4 Divider The LVEL33 is an integrated ÷4 divider. The LVEL is functionally equivalent to the EL33 and works from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the

k1213

Abstract: transistors k2628 transistor c1213 equivalent k1317 K0316 k2225 transistor k0232 k1117 k1518 k0317
Contextual Info: AN1560/D Low Voltage ECLinPS and ECLinPS Lite SPICE Modeling Kit Prepared by Senad Lomigora and Paul Shockman ON Semiconductor Broadband Application Engineers http://onsemi.com APPLICATION NOTE Objective The objective of this kit is to extend the information given

k2225 transistor

Abstract: k1118 k1117 k1213 power transistor k1821 transistor k1213 k1117 transistor K2225 k1518 transistor k1117
Contextual Info: AN1560/D Low Voltage ECLinPS and ECLinPS Lite SPICE Modeling Kit 150Prepared by Senad Lomigora and Paul Shockman ON Semiconductor Broadband Application Engineers http://onsemi.com APPLICATION NOTE Objective The objective of this kit is to extend the information given

EL33

Abstract: MC100LVEL33
Contextual Info: LVEL33 3.3V ECL ÷4 Divider Description The LVEL33 is an integrated ÷4 divider. The LVEL is functionally equivalent to the EL33 and works from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the

AZ100LVEL33

Abstract: ARIZONA MICROTEK ECL divider
Contextual Info: LVEL33 PECL/ECL ÷4 Divider www.azmicrotek.com FEATURES DESCRIPTION • • • The LVEL33 is an integrated ÷4 divider. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random logic state; the reset allows for the

SG86A

Abstract: SG53A sg72a LVEP17 MC100ELxxx EP809 LVEL40 SLVS TR30 AND8020
Contextual Info: AN1568/D Interfacing Between LVDS and ECL Prepared by: Paul Lee Logic Applications Engineer ON Semiconductor http://onsemi.com APPLICATION NOTE ECL levels Today’s applications typically use ECL devices in the PECL mode. PECL Positive ECL is nothing more than

MC100LVEL33

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA ^4 Divider M LVEL33 The LVEL33 is an integrated -f4 divider. The differential clock inputs and the V b b allow a differential, single-ended or AC coupled interface to the device. If used, the V b b output should be bypassed to

CAN split termination

Abstract: SG86A SG53A AN1568
Contextual Info: AN1568/D Interfacing Between LVDS and ECL Prepared by: Paul Lee Logic Applications Engineer ON Semiconductor http://onsemi.com APPLICATION NOTE ECL levels Today’s applications typically use ECL devices in the PECL mode. PECL Positive ECL is nothing more than

AZ100LVEL33

Abstract: AZ10LVEL33 AZ10LVEL33D AZ10LVEL33DR1 AZ10LVEL33DR2 MC100EL33 MC100LVEL33 MC10EL33
Contextual Info: ARIZONA MICROTEK, INC. LVEL33 LVEL33 ECL/PECL ÷4 Divider PACKAGE AVAILABILITY FEATURES • • • • • • Operating Range of 3.0V to 5.5V 470ps Propagation Delay 4.0GHz Toggle Frequency Internal Input Pulldown Resistors Direct Replacement for ON Semiconductor

MC10EL33

Abstract: AZ100LVEL33 AZ100LVEL33NG AZ10LVEL33 AZM10 MC100EL33 MC100LVEL33
Contextual Info: ARIZONA MICROTEK, INC. LVEL33 LVEL33 ECL/PECL ÷4 Divider PACKAGE AVAILABILITY FEATURES • • • • • • • • PACKAGE Green / RoHS Compliant / Lead Pb Free package available Operating Range of 3.0V to 5.5V 470ps Propagation Delay 4.0GHz Toggle Frequency

EP809

Abstract: AN1406 EP14 P1596 LVEL16 MC100ELxx AN1568
Contextual Info: AN1568/D Interfacing Between LVDS and ECL Prepared by: Paul Shockman Logic Applications Engineering http://onsemi.com APPLICATION NOTE LVDS outputs require a 100 Ω load between the differential outputs. This load will in addition terminate the 50 Ω controlled impedance lines.

HL33G

Contextual Info: LVEL33 LVPECL Divide by 4 Divider MLP8, MSOP8, SOIC8 Features Block Diagram 5.0+ GHz Toggle Frequency 470ps Propagation Delay Internal Input Pull-down Resistors 3.0V to 5.5V Power Supply  RoHS Compliant Pb Free Packages     Description