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    onsemi MC100LVEL40DWG

    Phase - Frequency Detector Differential ECL 3.3 V / 5.0 V
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    Master Electronics MC100LVEL40DWG
    • 1 -
    • 10 $16.91
    • 100 $12.02
    • 1000 $10.88
    • 10000 $10.76
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    Avnet Americas MC100LVEL40DWG Tube 15 Weeks 76
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    • 100 $10.37
    • 1000 $9.87
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    Mouser Electronics MC100LVEL40DWG 13
    • 1 $18.04
    • 10 $14.31
    • 100 $11.57
    • 1000 $11.00
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    Newark MC100LVEL40DWG Bulk 38
    • 1 -
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    • 1000 $10.35
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    Bristol Electronics MC100LVEL40DWG 99
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    Rochester Electronics MC100LVEL40DWG 3,515 1
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    • 100 $9.36
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    TME MC100LVEL40DWG 1
    • 1 $15.10
    • 10 $12.48
    • 100 $12.14
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    Avnet Silica MC100LVEL40DWG 16 Weeks 38
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    EBV Elektronik MC100LVEL40DWG 17 Weeks 38
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    Vyrian MC100LVEL40DWG 9,962
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    onsemi MC100LVEL40DWR2G

    3.3/5V ECL Differential Phase-Frequency Detector
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    Bristol Electronics MC100LVEL40DWR2G 724
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    Rochester Electronics MC100LVEL40DWR2G 4,236 1
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    • 100 $6.88
    • 1000 $6.15
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    Vyrian MC100LVEL40DWR2G 11,737
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    onsemi MC100LVEL40DW

    3.3/5V ECL Differential Phase-Frequency Detector
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    Bristol Electronics MC100LVEL40DW 41
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    Rochester Electronics MC100LVEL40DW 2,509 1
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    • 100 $4.00
    • 1000 $3.58
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    onsemi MC100LVEL40

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    Bristol Electronics MC100LVEL40 9
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    Fairchild Semiconductor Corporation MC100LVEL40DWR2G

    Clock Generators and Synthesizers Phase Frequency Detector 250MHz 20-SOIC Tube
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    Rochester Electronics MC100LVEL40DWR2G 548 1
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    LVEL40 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    AND8040

    Abstract: ko 247 MC100LVEL40
    Contextual Info: AND8040/D Phase Lock Loop General Operations Prepared by: Paul Shockman ON Semiconductor Logic Applications Engineering http://onsemi.com APPLICATION NOTE THEORY OF OPERATION A general phase lock loop may be modeled as a reference signal and a feedback signal driving a phase detector logic


    Original     		and8040/dr14525and8040ko 247+1mc100lvel40 PDF

    AND8040

    Abstract: AND8040/D MC100EP40 MC100LVEL40 PRAD-2
    Contextual Info: AND8040/D Phase Lock Loop General Operations Prepared by: Paul Shockman ON Semiconductor Logic Applications Engineering http://onsemi.com THEORY OF OPERATION A general phase lock loop may be modeled as a reference signal and a feedback signal driving a phase detector logic


    Original     		and8040/dand8040mc100ep40mc100lvel40+1prad-2 PDF

    K1213

    Abstract: k1518 transistor c1213 equivalent transistor k1213 k1112 K1113 k0305 k0205 k0309 equivalent k1117
    Contextual Info: AN1560/D Low Voltage ECLinPS and ECLinPS Lite SPICE Modeling Kit Prepared by Senad Lomigora and Paul Shockman ON Semiconductor Broadband Application Engineers http://onsemi.com APPLICATION NOTE Objective The objective of this kit is to extend the information given


    Original     		an1560/dan1503r14525k1213+9k1518transistor c1213 equivalenttransistor k1213k1112k1113k0305k0205k0309 equivalentk1117 PDF

    k1213

    Abstract: transistors k2628 transistor c1213 equivalent k1317 K0316 k2225 transistor k0232 k1117 k1518 k0317
    Contextual Info: AN1560/D Low Voltage ECLinPS and ECLinPS Lite SPICE Modeling Kit Prepared by Senad Lomigora and Paul Shockman ON Semiconductor Broadband Application Engineers http://onsemi.com APPLICATION NOTE Objective The objective of this kit is to extend the information given


    Original     		an1560/dan1503r14525k1213+9transistors k2628transistor c1213 equivalentk1317k0316k2225 transistork0232k1117k1518k0317 PDF

    k2225 transistor

    Abstract: k1118 k1117 k1213 power transistor k1821 transistor k1213 k1117 transistor K2225 k1518 transistor k1117
    Contextual Info: AN1560/D Low Voltage ECLinPS and ECLinPS Lite SPICE Modeling Kit 150Prepared by Senad Lomigora and Paul Shockman ON Semiconductor Broadband Application Engineers http://onsemi.com APPLICATION NOTE Objective The objective of this kit is to extend the information given


    Original     		an1560/d150preparedan1503k2225 transistor+9k1118k1117k1213power transistor k1821transistor k1213k1117 transistork2225k1518transistor k1117 PDF

    SG86A

    Abstract: SG53A sg72a LVEP17 MC100ELxxx EP809 LVEL40 SLVS TR30 AND8020
    Contextual Info: AN1568/D Interfacing Between LVDS and ECL Prepared by: Paul Lee Logic Applications Engineer ON Semiconductor http://onsemi.com APPLICATION NOTE ECL levels Today’s applications typically use ECL devices in the PECL mode. PECL Positive ECL is nothing more than


    Original     		an1568/dsg86asg53asg72a+7lvep17mc100elxxxep809lvel40slvstr30and8020 PDF

    CAN split termination

    Abstract: SG86A SG53A AN1568
    Contextual Info: AN1568/D Interfacing Between LVDS and ECL Prepared by: Paul Lee Logic Applications Engineer ON Semiconductor http://onsemi.com APPLICATION NOTE ECL levels Today’s applications typically use ECL devices in the PECL mode. PECL Positive ECL is nothing more than


    Original     		an1568/dr14525can split terminationsg86a+2sg53aan1568 PDF

    EP809

    Abstract: AN1406 EP14 P1596 LVEL16 MC100ELxx AN1568
    Contextual Info: AN1568/D Interfacing Between LVDS and ECL Prepared by: Paul Shockman Logic Applications Engineering http://onsemi.com APPLICATION NOTE LVDS outputs require a 100 Ω load between the differential outputs. This load will in addition terminate the 50 Ω controlled impedance lines.


    Original     		an1568/dr14525ep809an1406+5ep14p1596lvel16mc100elxxan1568 PDF