LS197 Search Results

74LS197

Abstract: 1N916 74LS N74LS197D N74LS197N
Contextual Info: Signetics 7 4 LS197 Counter Presettable 4-Bit Binary Ripple Counter Product Specification Logic Products FEATURES TY PE • A synchronous parallel load for presetting counter • Overriding M aster Reset PL [ T H jV c c Z H mr D2 [ T m o * Do EE °o E 33 d3

LS196

Abstract: LS197
Contextual Info: Presettable BCD Decade Ripple Counter LS196 Presettable 4-Bit Binary Ripple Counter LS197 FEATURES • B C D , bi quinary, binary counting modes ■ Asynchronous clear ■ F u lly programmable ■ M ay be used as 4 -B it latches PIN-OUT DIAGRAM DESCRIPTION

75ALS197

Abstract: 26LS33
Contextual Info: Quad D iff Line R S 4 2 2 /4 2 3 Receiver 75A LS197 ma T ★ TTL 3 T [6] tt Vcc [T ★ C C IT T t i b ^ V . 10, V II O u tp u t D is a b le E IN —»O u tp u t Iz M fr OUTPUT A [ T ★ EN A BLE ¡ T OUTPUT IN PU TS C c [T a fc n ab le—» (Jutput S ig

ls197

Contextual Info: LS197 National Semiconductor LS197 Presettable Binary Counters General Description The ’LS197 ripple counter contains divide-by-two and divide-by-eight sections which can be combined to form a modulo-16 binary counter. State changes are initiated by

T74LS197

Contextual Info: S G S- THôr i SôN r= 7 42E ]> 7 « îa ^ 2 3 7 0 0 3 3 1 ^ 3 -É É S Ê T H T74LS196 LS197 S d S -T H O M S O N T - y ^ - Z J 'X S 4-STAGE PRESETTABLE RIPPLE COUNTERS LOW POWER CONSUMPTION: TYPICALLY 80 mW ASYNCHRONOUS PRESETTABLE EASY MULTISTAGE CASCADING

c4554

Abstract: C4581 c4072 C4549 C4015 c4632 C4510 C4014 c4582 C4063
Contextual Info: LC9100, 92000 Series No.2723A J SA\YO A k O verview The LC9100, 92000 series are semicustom LSIs especially suited to <Jéyéìop l h ^ s e r ^ q u e s t é ^ l .S l in a short period of time and at a low cost. The LC9100, 92000 series provide 17 types of m aster chip having

TDA0161 equivalent

Abstract: 1N3393 BDX54F equivalent byt301000 bux transient voltage suppressor ST90R9 ua776mh sgs 2n3055 Transistor morocco mje13007 inmos transputer reference manual
Contextual Info: SHORTFORM 1995 NOVEMBER 1994 USE IN LIFE SUPPORT DEVICES OR SYSTEMS MUST BE EXPRESSLY AUTHORIZED SGS-THOMSON PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF SGS-THOMSON Microelectronics. As used herein:

74LS115

Abstract: 74LS273 74LS189 equivalent 74LS00 QUAD 2-INPUT NAND GATE 74LS265 fan-in and fan out of 7486 74LS93A 74LS181 74LS247 replacement MR 31 relay
Contextual Info: F A IR C H IL D LOW POWER S C H O T T K Y D A TA BOOK ERRATA SHEET 1977 Device Page Item Schematic 2-5 Figure 2-6. Blocking diode in upper right is reversed. Also, diode con­ necting first darlington emitter to output should have series resistor. LS33 5-25

NEh jJ8

Abstract: k30270 LB 11911 095275-VK20BA ue09 KM 7-C 1 UF -20 100V 74S83 S0807 74LS32N z3ans
Contextual Info: R E V IS IO N S DESCRIPT'ON » * * LTR MARK AM*« P iK PXÛC1S1 Z v cmpcz procgsz z. 2 PL J L MARK PEU PE0C£5S J p 6 H A A # i WAS 9?Z7£9-toZW E 6 m * T £ D * £ / i £ r £ t d i0 £ # i/ tty * * ¡è k w - ¿ A J 4 0 1 6 9 / & J / O / i. — to * D D £ D

Contextual Info: SG60R4 Schottky TTL • Over 180 LS Devices • ALS • FAST TOTAL TTL COMMITMENT «TOTAL • TTL Compatible Macrocell Arrays • RAMs • PROMs General Information TTL in Perspective proved speed — p o w e r product co m p ared to LS as a result o f ad vanced M O S A IC oxide isolated processing.

SN74ALS123

Abstract: SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138
Contextual Info: INDEX • FUNCTIONAL SELECTION GUIDE • NUMERICAL FUNCTION INTERCHANGEABILITY GUIDE GENERAL INFORMATION AND EXPLANATION OF NEW LOGIC SYMBOLS ORDERING INSTRUCTIONS AND MECHANICAL DATA 54/74 SERIES OF COMPATIBLE TTL CIRCUITS • PIN OUT DIAGRAMS 54/74 FAMILY SSI CIRCUITS

dm8130

Abstract: 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76
Contextual Info: 19 7 6 N atio n al S e m ico n d u cto r C o rp . p 1 ? I m • ' % TTL Data Book D EV IC E MIL i 2502 2503 2504 5400 54H00 54L00 54LS00 5401 54H01 54L01 54LS01 5402 54L02 54LS02 5403 54L03 54LS03 5404 54H04 54L04 54LS04 5405 54H05 54L05 54LS05 5406 5407 5408

DM74367

Abstract: 54175 71ls97 DM74109 DM8160 om541 ci 8602 gn block diagram 5401 DM transistor 74L10 74S136
Contextual Info: N ational Semiconductor Section 1 - 54/74 SSI DEVICES Connection Diagram s • Electrical Tables Section 2 - 54/74 M SI DEVICES Section 3 - National Semiconductor PROPRIETARY DEVICES Section 4 - National Semiconductor ADDITIONAL D EV KES t o NATIONAL Manufactured under one or more of the fo llowing U.S. patents: 3083262, 3189758, 3231797 , 3303356, 3317671, 3323071, 3381071, 3408542, 3421025, 3426423, 3440498, 3518750, 3519897, 3557431, 3560765,

IC AND GATE 7408 specification sheet

Abstract: 74LS183 74LS96 SN 74168 7486 XOR GATE IC 74LS192 IC 7402, 7404, 7408, 7432, 7400 IC 7486 for XOR gate IC 74183 74LS193 function table
Contextual Info: PLS-EDIF Bidirectional EDIF Netlist Interface to MAX+PLUS Software Data Sheet September 1991, ver. 3 Features u J Provides a bidirectional netlist interface b etw ee n M A X + P L U S and other m ajor C A E softw are packages Sup ports the industry-standard Electronic Design Interchange Format

sn74106

Abstract: s196 SN54LS196 SM74196 SN74S197 SN74S196 sh54
Contextual Info: TYPES SN5419S. SNS4197. SH54LS196. LS197.SNS4St86, SN54S197, SH74H9. SH74197. SR74LSW6. LS197.SN74S19S. SM74S187 50/30/100-MHz PRESETTABLE DECADE OR BMARY COUNTERS/LATCHES B U L L E T IN NO. OL-3 7711808. O C T O B ER 1B78-IW VISgO A U G U ST 1877

74S196

Abstract: 74S196 TTL 54s196 IC 74196 54S197 74S197
Contextual Info: TYPES SN54196, SN54197, SN54LS196, LS197, SN54S196, SN54S197, SN74196, SN74197, SN74LS196, LS197, SN74S196, SN74S197 50/30/100-MHz PRESETTABLE DECADE OR BINARY COUNTERS/LATCHES OCTOBER 1976-REVfSED APRIL 1985 Performs BCD , Bi-Quinary, or Binary Counting

LG color tv Circuit Diagram schematics

Abstract: texas ttl YJ 162A Texas Instruments TTL integrated circuits catalog SN74180 AC digital voltmeter using 7107 Sii 9024 MC3123 sn74ls860 SN7490AJ sn74243
Contextual Info: IN D EXES Alphanumeric • Functional/Selection Guide IN T E R C H A N G E A B ILIT Y GUIDE G E N E R A L INFORM ATION O RD ERIN G IN STRUCTIO N S AND M ECH A N ICA L D A TA 5 4 /7 4 FA M ILIE S OF CO M PATIBLE T T L C IR C U ITS 54/74 F A M IL Y SSI C IR C U ITS

C1995

Abstract: DM74LS197 DM74LS197M DM74LS197N LS196 LS197 M14A N14A
Contextual Info: LS197 Presettable Binary Counters General Description The ’LS197 ripple counter contains divide-by-two and divide-by-eight sections which can be combined to form a modulo-16 binary counter State changes are initiated by the falling edge of the clock The ’LS197 has a Master Reset MR input which overrides all other inputs and asynchronously forces all outputs LOW A Parallel Load input

LS196

Abstract: 74ls196 LS197 6CP-15 cdq8 751A-02 SN54LSXXXJ SN74LSXXXD SN74LSXXXN 522Q2
Contextual Info: SN54/74LS196 SN54/LS197 4-STAGE PRESETTABLE RIPPLE COUNTERS The SN54/74LS196 decade counter is partitioned into divide-by-two and divide-by-five sections which can be combined to count either in BCD 8, 4, 2, 1 sequence or in a bi-quinary mode producing a 50% duty cycle output. The

ic 74 LS 138 DECODER

Abstract: Alu 181 8 bit bcd adder/subtractor f245 motorola lal 2084 TTL 74-series IC LIST internal circuitry for sr flip flop T flip flop IC LS248 4-bit bcd subtractor
Contextual Info: SG 6 0R 4 Schottky TTL • O v e r 180 LS Devices • ALS • FAST • TTL C o m p a tib le M acrocell A rra y s • RAMs • PR O M s 006844 /y err This Material Copyrighted By Its Respective Manufacturer General Inform ation TTL in Perspective proved speed — p o w e r product co m p ared to LS as a

74LS196

Abstract: LS196 ls 377 SN54/74LS196 751A-02 LS197 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
Contextual Info: SN54/74LS196 SN54/LS197 4-STAGE PRESETTABLE RIPPLE COUNTERS The SN54/74LS196 decade counter is partitioned into divide-by-two and divide-by-five sections which can be combined to count either in BCD 8, 4, 2, 1 sequence or in a bi-quinary mode producing a 50% duty cycle output. The

Contextual Info: g SN54/74LS196 SN54/LS197 M OTOROLA D E S C R I P T I O N — T he S N 5 4 L S / 7 4 L S 1 9 6 decade counter is partitioned into divide-by-two and divide-by-five sections w h ich can be com bined to count either in B C D (8,4,2,1) sequence or in a bi-quinary

Contextual Info: 4-STAGE PRESETTABLE RIPPLE COUNTERS DESCRIPTION The T54LS196/T74LS196 decade counter is par­ titioned into divide-by-two and divide-by-five sec­ tion which can be combined to count either in BCD 8 ,4,2 , 1 sequence or in a bi-quinary mode produ­ cing a 50% duty cycle output. The LS197/

ns 4248

Abstract: 74LS196N 54LS196 LS196 54LS197 74LS196 74LS197 DM54 DM54LS196 DM74LS196
Contextual Info: DM54LS196/DM74LS196, LS197/LS197 National Semiconductor DM54LS196/DM74LS196, LS197/LS197 Presettable Decade and Binary Counters General Description These h ig h-speed c o u n te rs c o n s is t o f fo u r d-c co up le d, m a ste r-sla ve flip -flo p s w h ic h are in te rn a lly in te rc o n ­