LH534R00 Search Results

lh5s4

Abstract: LH537 lh5s4p lh5s4R lh5s46 LH538 44SOP lh533200 LH5s 5g85
Contextual Info: MASK ROM ☆ New product ★ • M Capacity ASK F O M S Bit Pinout* configuration Model No. LH53V4T00E J J x8 4M x 16 x 8/ x 16 x8 8M x 8/ x 16 LH53V4ROOAN/AT LH53V4R00N/T J J J LH53V4YG0N/E LH53H4100D/N LH534700D/N LH534R00BD/BN LH53V4B00T J J F F LH534A00T

32DIP

Abstract: 32-PIN LH534
Contextual Info: LH534R00A CMOS 4M 512K x 8 Mask-Programmable ROM FEATURES • 524,288 words × 8 bit organization • Access time: 120 ns (MAX.) • Power consumption: Operating: 357.5 mW (MAX.) Standby: 550 µW (MAX.) PIN CONNECTIONS 32-PIN DIP 32-PIN SOP TOP VIEW OE1/OE1/DC

Contextual Info: CMOS 4M 512K x 8 Mask-Programmable ROM FEATURES DESCRIPTION • 524,288 x 8 bit organization The LH534R00 is a 4M-bit mask-programmable ROM organized as 524,288 x 8 bits. It is fabricated using silicon-gate CMOS process technology. • Access time: 120 ns (MAX.)

lh5s4

Abstract: lh5348 LH5s lh5s47xx 48-TSOP LH53H4100D LH53H4100N lh534y00d 48TSOP sharp mask rom
Contextual Info: NEW PRODUCT INFORMATION SHARP LH53 H4100 • Description High-speed 4M-bit Mask-Programmable ROM ■ Pin Connections The LH53H4100D/N User's No. ! LH5H41XX is a CMOS 4M-bit mask-programmable ROM organized as 524 288 X 8 bits. It is fabricated using sillicon-gate CMOS process technology.

536G

Abstract: LH534600
Contextual Info: MEMORIES • Mask ROMs Process Capacity * Configuration words X bits Pinout Access time Model No. (ns) MIN. Supply current (mA) MAX. Supply voltage (V) (ns) MAX. User's No. Cycle tima Package 256k 32k X 8 J LH53259D/N/T L H 5359X X 150 25 5 ± 10% 28DIP/28SOP/28TSOP(I)

lh57257

Abstract: IR2E31 IR2E01 IR2C07 IR2E27 IR2E24 IR2E19 IR2E31A IR3n06 IR2E02
Contextual Info: Index Model No. ARM7D CPU Core Bi-CMOS 1 27 40,42 _ _ CMOS CMOS CMOS CMOS CMOS 4A 5A 8 A AH D ID1 Series ID2 Series 40,42 40.42 40,42 40,42 40 B ü.’1*"! 14,15 14 m IR2339 IR2403 IR2406 IR2406G IR2410 IR2411 IR2415 IR2419 IR2420 IR2422 IR2425 IR2429

LH231G

Abstract: lh5348 LH538b LH2326 lh5s4 LHMN5 lh5359 lh5348xx lh537 LH235
Contextual Info: MEMORIES ★Under development • M ask ROMs SlpÉHRfi Bonflgmllan jvorai x d m i NMOS <"^g|g|ï|ïi£- User1* No. sssysr Sllpjiijp 1 currant mA MAX. ■ Paefcagfe ft- • 64k 8k x 8 LH2389D LH2369XX 200 60 5 ± 10% 28DIP 128k 16k x 8 LH23128D LH2326XX 200

flash 64m

Contextual Info: MEMORIES Mask ROMs C a p a c ity Access time C o nfig u ra tio n 120ns 100ns 80ns 150ns 256kj I 32k x 8 ] LH53259 12k I 64k x 8 LH53517 128k x 8 LH530800A LH531V00 1M LH531024 64k x 16 i LH532100B-1 256k x 8 ! LH532100B 2M JEDEC standard EPROM pinout 128k x 161

lh5348

Abstract: lh5s4 48TSO
Contextual Info: ü fi LH53V4R00 LH53V4R00-2 • Description ■ Pin Connect for T h e L H 5 3 V 4 R 0 0 N /T , L H 5 3 V 4 R 0 0 N /T -2 U ser's N o . : L H 5V 4R X X is a CM OS 4 M -b it m ask-program m able ROM 32-pin SOP organized as 524 288 X 8 bits. It provides a high-speed access time o f 120/150 ns with low

lh5348

Abstract: TSOP032-P-0820 lh5s4 flash memory sop 32-pin lh5348xx lh5s47xx
Contextual Info: NEW PRODUCT INFORMATION LH53V4R00 LH53V4R00-2 • Low-Voltage • High-Speed 4M-bit Mask-Programmable ROM Description Pin Connection T he L H 5 3 V 4 R 0 0 N /T , L H 5 3 V 4 R 0 0 N /T -2 U s e r's N o. : LH5V4RXX is a CM O S 4M -bit m ask-program m able ROM

lh5s4

Abstract: lh5348 sharp lh53 lh5s47xx LH5S47 60446 sharp mask rom LH53V4R00N LH5H41XX TSOP032-P-0820
Contextual Info: NEW PRODUCT INFORMATION LH53V4R00 LH53V4R00-2 • Description Low-Voltage • High-Speed 4M-bit Mask-Programmable ROM Pin Connection The L H 53V 4R 00N /T , L H 53V 4 R 0 0 N /T -2 U ser’s N o. : LH5V4RXX is a CMOS 4M -bit mask-programmable ROM 32-pin SOP

LQ070T5BG01

Abstract: LM24P20 LM162KS1 BSCR86L00 IR2C07 LM5Q31 IR3Y29B BSCU86L60 lq6bw lq6bw506
Contextual Info: INDEX 1 0 4 - 1 0 9 _ DC_ GL1PR112.69 GL3KG63. 66 GL5EG41.66 1 0 4 - n 0 5 O o c .113 DC1B1CP. 100 GL1PR135.69 GL3KG8. 66

DIC14

Abstract: 78A3
Contextual Info: CMOS 4M 512K x 8 Mask-Programmable ROM • Access time: 120 ns (MAX.) 32-PIN DIP 32-PIN SOP TOP VIEW /•* O E t/Ö Ii/D C L • Power consumption: Operating: 357.5 mW (MAX.) Standby: 550 nW (MAX.) 2 31 H A ib A is LI 3 30 □ a A12C 4 29 H a 14 a 7C 5 26 ^ a 13

IR3Y29B

Abstract: ir3y26a1 IR4N IR3T24N IR3C08N ir2c53 ir2c05 li3301 IR3Y08 IR2E02
Contextual Info: Index Model No. IR3T ARM710 ARM7DI ARM7DM ARM7TDMI ARM7TDMI-SPL ARM8 ARM810 CMOS CMOS CMOS CMOS F series G series J series K series ID22 series ID222XX ID223XX ID224XX ID226XX ID227XX ID229XX ID22DXX ID22FXX ID22HXX ID240 series ID240DXX ID240EXX ID240GXX

48 tsop flash pinout

Abstract: LH23512
Contextual Info: MEMORIES Mask ROMs ^Under development Capacity Pinout Model No. Configuration Access time ns 55 1 64k !- 1 8k x 8 128k 16k x ! 256k 32k x 8 |- -) [ 512k 64k x 8 b — I 80 100 120 150 200 Package 250 500 □ LH2369 28 LH23255 28 □ LH53259 28 28 38(1)

Contextual Info: CMOS 4M 512K x 8 Mask-Program m able ROM DESCRIPTION FEATURES • 524,288 x 8 bit organization • Access time: 120 ns (MAX.) • Power consumption: Operating: 358 mW (MAX.) Standby: 550 jiW (MAX.) • Mask-programmable control pin: Pin 1 - OE^OEi/DC Pin 24 - OBOE

Contextual Info: CMOS 4M 512K x 8 Mask-Programmable ROM FEATURES • 524,288 words x 8 bit organization • Power consumption: Operating: 357.5 mW (MAX.) 32-PIN DIP 32-PIN SOP TOP VIEW A1 6 ^ 1 • 2 A1 5 C 3 30 □ a 17 A 1 2 IZ 4 29 □ a 14 a 7C 5 28 3 a 13 ^6 H 6 27 □ Ag

IR2E27A

Abstract: IR2C53 IR2E02 IR2E27 IR2E10 IR3N34 IR2E31A IR2E01 IR2C07 ir2e31
Contextual Info: lndeX Model No. ARM7D CPU Core28,32,33 ARM7DM 28,33 CMOS CMOS CMOS CMOS 76 5A A F G 44 44 44 44 ID1 series ID2 series ID3 seríes ID21K064 ID21K128 ID21K256 ID21K512 ID21M010 ID21M015 ID21M020 ID21M040 ID22K256 ID22K512 ID22M010 ID22M020 ID22M040 ID22M080

lh5s4

Abstract: LH-MN47XX lh5s4axx LH5359 LH5s lh5317 LH532CXX 32DIP
Contextual Info: MEMORIES • JEDEC Standard EPROM Pinout • Low voltage operation 3 V, 1.8 V Access time Bit Capacity configuration 1M 2M 4M Model No. LH53V1ROON/T LH53V2R00AN/AT LH53V2T00E LH53V2YOONÆ LH53V4T00E LH53V4R00AN/AT LH53V4Y00NÆ x 8 x 8 x 8 User’s No. Supply

sharp mask rom

Abstract: cd rom 40 pinout lh5348 lh5s4 LH5S
Contextual Info: NEW PRODUCT INFORMATION SHARP LH53H4000 • Description The LH53H4000D/N User's No. : LH5H40XX is a CMOS 4M-bit mask-programmable ROM organized as 524 288 X 8 bits (Byte mode) or 262 144 X 16 bits (Word mode) that can be selected by BYTE input pin. ■ Features

lh5348

Abstract: lh5s4 lh5348xx sharp mask rom LH534A00T LH5s LH534B00T 40-DIP
Contextual Info: NEW PRODUCT INFORMATION SHARP LH53H4100 • High-speed 4M-bit Mask-Programmable ROM ■ Description Pin Connections The LH53H4100D/N User's No. ! LH5H41XX is a CMOS 4M-bit mask-programmable ROM organized as 524 288 X 8 bits. It is fabricated using sillicon-gate CMOS process technology.

Contextual Info: CMOS 4M 1M x 4 MROM FEATURES • 524,288 x 8 bit organization • Access time: 120 ns (MAX.) • Supply current: -O p e ra tin g : 65 mA (MAX.) -S ta n d b y : 100[iA(M AX.) • Three-state output • Single +5 V Power supply PIN CONNECTIONS 32-PIN SOP 32-PIN DIP

Contextual Info: CMOS 4M 512K x 8 Mask-Programmable ROM PIN CONNECTIONS • 524,288 words x 8 bit organization TOP VIEW f 1• O E^Ô Ë/D C E • Power consumption: Operating: 357.5 mW (MAX.) A ie E 2 31 E a 18 A15E 3 30 □ a 17 A12E 4 29 □ a 14 A7E 5 28 □ a 13 A0 e

lh5348

Abstract: lh5348xx sharp mask rom lh5s4
Contextual Info: NEW PRODUCT INFORMATION SHARP LH53 H 4100 • High-speed 4M-bit Mask-Programmable ROM ■ Description Pin Connections The LH53H4100D/N User’s No. : LH5H41XX is a CMOS 4M-bit mask-programmable ROM organized as 524 288 X 8 bits. It is fabricated using sillicon-gate CMOS process technology.