I860 Search Results

est 7502 b data sheet

Contextual Info: P E H I1 0 IM 1 D B M IV i n Dt t e : s. i 991 82495XP CACHE CONTROLLER/ 82490XP CACHE RAM • Two-Way, Set Associative, Secondary Cache for i860 XP Microprocessor MESI Cache Consistency Protocol ■ 50 MHz “No Glue” Interface with CPU Maintains Consistency with Primary

00A75

Abstract: INTEL Core i7 860 J 80222 lm 6358 J1 3009-2 271121 Texture mapping CC1105 Intel i860
Contextual Info: P K H IL D fiflD M M V MILITARY i860 XR 32/64-BIT MICROPROCESSOR • Parallel Architecture that Supports Up to Three Operations per Clock — One Integer or Control Instruction per Clock — Up to Two Floating-Point Results per Clock ■ High Performance Design

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Abstract: DDA13 DDA05 d45u DDA31 ADRS05 D0C03
Contextual Info: CYM7232 CYM7264 DRAM Controller Module ADVANCED INFORMATION Features • 4-megabyte to 1-gigabyte capacity • 32- or 64-bit bus interface M7232 only • 32- or 64-bit EDC versions — 1-bit correct; 2-bit detect • Multiplexed or non-multiplexed bus • i486, i860,68040, 88110, SPARC, and

processor

Abstract: sky power Sky Computers intel i860 intel I860 processor I860
Contextual Info: ACCESSORY BOARDS SKY COMPUTERS, INC. SKYstation II* • ■ ■ ■ ■ ■ ■ ■ ■ ■ 640 MFLOPS Plugged Directly into SCSI Port i960 Processor Handles Interrupts and I/O Leaving the i860 Processors Free For Processing 512 Mb Bulk Memory and 128 Mb

Q07S

Abstract: 18CV EZ-319 p85c22066 ep330 85C220 intel PLD 290134 p85c220-80
Contextual Info: INTEL CORP intgJ Mû Sb 17b 00721=52 7 MME D MEMORY/PLD/ XTL2 85C220-80 FAST 1-MICRON CHMOS 8-MACROCELL jmPLD High-Performance, Low-Power Upgrade for SSI/MSI Logic and Bipolar PALs* in lntel386TM, 1486TM, i860 , 80960 Series, and Other High-Performance Systems

MTA02

Abstract: i860Xp MT 8222 Intel 82495 Cache Controller 3ce-14 LR1 D09 ahy 103 i860 64-Bit Microprocessor Performance Brief MCache Second Level Cache-Controller
Contextual Info: in t e ! 82495XP CACHE CONTROLLER/ 82490XP CACHE RAM Two-Way, Set Associative, Secondary Cache for i860 XP Microprocessor 50 MHz “No Glue” Interface with CPU Configurable — Cache Size 256 or 512 Kbytes — Line Width 32, 64 or 128 Bytes — Memory Bus Width 64 or 128 Bits

intel i860

Abstract: A80860XR-40 pbit 2180 a80860xr-33 A80860XR40 TE 2197 transistor 8550 sad intel I860 processor pin diagram of XR 2206 i860 64-Bit Microprocessor Performance Brief
Contextual Info: i860 XR 64-BIT MICROPROCESSOR • Parallel Architecture that Supports Up to Three Operations per Clock ' — One Integer or Control Instruction per Clock — Up to Two Floating-Point Results per Clock ■ High Performance Design — 25/33.3/40 MHz Clock Rates

Contextual Info: i860 64-BIT MICROPROCESSOR • Compatible with Industry Standards — ANSI/IEEE Standard 754-1985 for Binary Floating-Point Arithmetic — 386™ /i486TM Microprocessor Data Formats and Page Table Entries — JEDEC 168-pin Ceramic Pin Grid Array Package see Packaging

4B32

Abstract: three phase half wave Rectifier 10KV SiC Xenon 7000 "12 amp" bridge rectifier single phase tube FULL WAVE RECTIFIER CIRCUITS quadrature bridge HALF WAVE RECTIFIER CIRCUITS 4B-32 FULL WAVE bridge RECTIFIER CIRCUITS
Contextual Info: TENTATIVE DATA 4B32 - TUN6S0L DIODE 2 320" MAX. FIL A M E N T A 5 . 0 ± 5 Î VO LTS 7 . 2 5 AMP. AC OR DC ? 00 co o ANY MOUNTING P O S IT IO N ü BOTTOM VIEW H i860" JUMBO B AY ON ET 4 P I N BASE GLASS BULB THE 4 B 3 2 IS A XENON F IL L E D H ALF WAVE R E C T IF IE R FOR USE IN H IG H VOLTAGE

Contextual Info: Ä ID W A M < & g DKlF [^ôiÆ ÂTB©M in te i M85C224 FAST 1-MICRON CHMOS 8-MACROCELL jaPLD Up to 22 Inputs 14 Dedicated & 8 I/O and 8 Outputs High-Performance, Low-Power Upgrade for SSI/MSI Logic and Bipolar PALs* in Intel386 , i486™, i860™, 80960 Series,

i860

Abstract: sky power intel i860 Sky Computers
Contextual Info: ACCESSORY BOARDS SKY COMPUTERS, INC. SKYbolt Family • ■ ■ ■ ■ ■ ■ ■ ■ i960 Processor Handles Interrupts and I/O Four i860 Processors in a Single 6U VME Slot Provides 320 MFLOPS of Processing Speed 16 i860 Processors in a Single 9U VME Slot Provides 1.28 GFLOPS of

i860

Abstract: sky power
Contextual Info: ACCESSORY BOARDS SKY COMPUTERS, INC. SKYbolt II* Family • ■ ■ ■ ■ ■ ■ ■ ■ ■ Four i860 Processors in a Single 6U VME Slot Provides 320 MFLOPS of Processing Speed i960 CA Processor Handles Interrupts and I/O 320 Mb/sec. SKYchannel Packet

Intel i860

Contextual Info: INTEL CORP UP/PRPHLS bflE » • 4ñ2bl7S Dia^flSb in te i i860 XR 64-BIT MICROPROCESSOR ■ Parallel Architecture that Supports Up to Three Operations per Clock — One Integer or Control Instruction per Clock — Up to Two Floating-Point Results per

Intel 82495 Cache Controller

Abstract: i860Xp J222J Si 7661 replacement TA 7503 TAG 9245 cache controller i860 64-Bit Microprocessor Performance Brief MCache yx 861
Contextual Info: P K IL O IM ID K IÄ K Y in te i Dt • s. -991 82495XP CACHE CONTROLLER/ 82490XP CACHE RAM Two-W ay, Set Associative, Secondary Cache fo r i860 XP M icroprocessor MESI Cache Consistency Protocol 50 MHz “ No Glue” Interface with CPU Maintains Consistency with Primary

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Contextual Info: in t e i 82495XP CACHE CONTROLLER/ 82490XP CACHE RAM Two-Way, Set Associative, Secondary Cache for i860 xp Microprocessor 50 MHz “No Glue” Interface with CPU Configurable — Cache Size 256 or 512 Kbytes — Line Width 32, 64 or 128 Bytes — Memory Bus Width 64 or 128 Bits

Contextual Info: in te * MILITARY i860 64-BIT MICROPROCESSOR Parallel Architecture that Supports Up to Three Operations per Clock — One Integer or Control Instruction per Clock — Up to Two Floating-Point Results per Clock • Compatible with Industry Standards — ANSI/IEEE Standard 754-1985 for

FGT 313

Abstract: N06010 a3058c 271121 intel i860
Contextual Info: [ p fô iy iiM A O W in te L MILITARY i860 XR 32/64-BIT MICROPROCESSOR Parallel Architecture that Supports Up to Three Operations per Clock — One Integer or Control Instruction per Clock — Up to Tw o Floating-Point Results per Clock High Perform ance Design

ba 6414 fs

Abstract: RTL 2832 A80860XP i860Xp 80860XR 80860XP equivalent of transistor tt 2148 transistor x 313 ca 361 e ic 82490XP
Contextual Info: intei I860 XP MICROPROCESSOR • Parallel Architecture that Supports Up to Three Operations per Clock — One Integer or Control Instruction — Up to Two Floating-Point Results ■ High Performance Design — 40/50 MHz Clock Rate — 100 Peak Single Precision MFLOPS

Contextual Info: i860 XR 64-BIT MICROPROCESSOR • Parallel Architecture that Supports Up to Three Operations per Clock — One Integer or Control Instruction per Clock — Up to Two Floating-Point Results per Clock ■ High Performance Design — 25/33.3/40 MHz Clock Rates

PC 845 MOTHERBOARD CIRCUIT diagram

Abstract: PC 845 MOTHERBOARD VOLTAGE diagram inmos transputer T425 imsc004 ttm22 inmos transputer T225 PC 845 MOTHERBOARD CIRCUIT diagram PC KT805 IMSB426 inmos transputer reference manual
Contextual Info: TRANSPUTER TRAM SOLUTIONS Transtech Parallel Systems designs and manufactures embedded multi-processing products for OEM, end-user and scientific research applications. Transtech produces signal processing and computing systems based on SGSThomson transputers, PowerPC processors, Analog

h743

Abstract: kd874z
Contextual Info: Cable Connectors & Replacement Whips with Adapters C-5010M 10-pack 14-544-1 Mini-UHF Male (crimp tool req'd) C-5010T (10-pack) 14-508-2 MaleTNC (crimp tool req'd) C-5010UM (10-pack) 14-1034-1 Mini-UHF Male Adapter for SAP nipple connector C-5010UT (10-pack)

Contextual Info: in te i 1-MBIT 128K X 8 BOOT BLOCK FLASH MEMORY 2 8 F 0 0 1 B X -T /2 8 F 0 0 1 B X -B /2 8 F 0 0 1 B N -T /2 8 F 0 0 1 B N -B • High-Integration Blocked Architecture — One 8 KB Boot Block w/Lock Out — Two 4 KB Parameter Blocks — One 112 KB Main Block

Contextual Info: in te l A28F400BX-T/B 4-MBIT 256K x16, 512K x8 BOOT BLOCK FLASH MEMORY FAMILY Automotive x8/x16 Input/Output Architecture — A28F400BX-T, A28F400BX-B — For High Performance and High Integration 16-bit and 32-bit CPUs Optimized High Density Blocked Architecture

Contextual Info: r a iO M O G O M V Military ì860tm 64-Bit M icro p ro cesso r • Compatible with Industry Standards — ANSI/IEEE Standard 754-1985 for Binary Floating-Point Arithmetic — 386 /j 486TM Microprocessor Data Formats and Page Table Entries ■ Parallel Architecture that Supports Up