FLIP-FLOP RS Search Results

ECL 10131

Abstract: signetics 10131 10131dc 10131N 10131F 25CC C30C62
Contextual Info: S ignetics 10131 Flip-Flop Dual D-Type Master-Slave Flip-Flop Product Specification ECL Products DESCRIPTION The 10131 is a Dual Master-Slave Flip­ Flop. Each flip-flop can be clocked sepa­ rately by holding the common Clock in the LOW state and using the Clock

ECL 100151

Abstract: 100151 PM710 100151F 100151Y
Contextual Info: Signetics 100151 Flip-Flop Hex D-Type Master-Slave Flip-Flop Product Specification ECL Products DESCRIPTION The 100151 contains six flip-flops with complement and data outputs, a master reset MR and a pair of common clock inputs. Data enter the flip-flop on the

TC40H076AP

Abstract: AH120 A140S TC40H076P TC40H76AP
Contextual Info: TOSHIBA INTEGRATED CIRCUIT TECHNICAL DATA Æ TC40H076P/F TC40H076AP/AF C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC40H076 TC40H076A DUAL J-K FLIP-FLOP PULSE TRIGGER TYPE DUAL J-K FLIP-FLOP (EDGE TRIGGER TYPE) The TC40H076 is a dual J-K flip-flop with

74107 pin diagram

Abstract: 74107 74LS107 74107 flip flop H/CI 74107 pin configuration 74LS107 1N3064 1N916 74LS LS107
Contextual Info: 74107, LS107 Signetics Flip-Flops Dual J-K Flip-Flop Product Specification Logic Products DESCRIPTION Th e '1 0 7 is a dual flip-flop with individual J, K, Clock and direct R eset inputs. The 7 4 1 0 7 Is a positive pulse-triggered flip­ flop. JK information is loaded into the

54ACT

Abstract: 54ACT534 ACT374
Contextual Info: Semiconductor & 54ACT534 Octal D Flip-Flop with TRI-STATE Outputs General Description The ’ACT534 is a high-speed, low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and TRI-STATE outputs for bus-oriented applications. A buff­

Contextual Info: a s OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS £0 $ DESCRIPTION The T54LS374/T74LS374 is a high-speed, lowpower Octal D-type Flip-Flop featuring separate Dtype inputs for each flip-flop and 3-state outputs for oriented applications. A buffered Clock CP and

Contextual Info: M MOTOROLA OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE The SN 54/74LS 377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common clock enable.

Contextual Info: o. _ , Revised Ja nuary 1999 SEMICONDUCTOR TM 74AC374 • 74ACT374 Octal D-Type Flip-Flop with 3-STATE Outputs General Description Features The AC /AC T374 is a high-speed, low -pow er octal D -type flip-flop featuring separate D-type inputs for each flip-flop

Contextual Info: 3.3 V CMOS 10-BIT FLIP-FLOP WITH DUAL OUTPUTS, 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: This 10-bit flip-flop is built using advanced dual metal CMOS technology. The ALVCH162820 is an edge-triggered D-type flip-flop. On the positive transition of the clock CLK

OF IC 74LS175

Abstract: 74ls175 pin diagram
Contextual Info: M MOTOROLA SN54/74LS175 QUAD D FLIP-FLOP The LSTTL/MSI SN54/74LS175 is a high speed Quad D Flip-Flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D inputs is stored during the LOW to

100131F

Abstract: 100131Y
Contextual Info: 100131 Signetics Flip-Flop Triple D-Type M aster-Slave Flip-Flop Product Specification ECL Products DESCRIPTION 100131 has three D-type flip-flops, with direct and output, separate clock, set addition, all three flip-flops mon clock, set and reset. master-slave

Contextual Info: MOTOROLA DUAL J-K FLIP-FLOP MC14027B The MC14Q27B dual J-K flip-flop has independent J, K, Clock {Q, Set S and Reset |R) inputs for each flip-flop. These devices may be used in control, register, or toggle functions. CMOS SSI • • Diode Protection on A ll Inputs

10631 flip-flop

Abstract: HA611 10631
Contextual Info: M MOTOROLA Military 10631 High Speed Dual D Type Master Slave Flip-Flop ELECTRICALLY TESTED PER: MIL-M-38510/06102 The 10631 is a dual master-slave type D flip-flop. Asynchronous Set (S) and Reset (R) override Clock (C c) and Clock Enable (Cg) inputs. Each flip-flop may

DS00954

Abstract: CERAMIC LEADLESS CHIP CARRIER 54F534DM 74F534 74F534PC 74F534SC 74F534SJ F374 J20A M20D
Contextual Info: EM ICDNDUCTOR t 74F534 Octal D-Type Flip-Flop with 3-STATE Outputs General Description Features The ’F534 Is a high speed, low -pow er octal D-type flip-flop featuring separate D -type inputs for each flip-flop and 3-STATE outputs for bus-oriented a p plications. A buffered

Contextual Info: 3.3 V CMOS 10-BIT FLIP-FLOP WITH DUAL OUTPUTS, 3-STATE OUTPUTS AND BUS-HOLD IDT74ALVCH162820 DESCRIPTION: FEATURES: This 10-bit flip-flop is built using advanced dual metal CMOS technology. The ALVCH162820 is an edge-triggered D-type flip-flop. On the positive transition of the clock CLK

Contextual Info: 74LS377 S ignetics Flip-Flop Octal D Flip-Flop With Clock Enable Product Specification Logic Products FEATURES • Ideal for addressable register applications • Clock Enable for address and data synchronization applications • Eight edge-triggered D flip-flops

Contextual Info: 74LS377 Signetics Flip-Flop Octal D Flip-Flop With Clock Enable Product Specification Logic Products FEATURES • Ideal for addressable register applications • Clock Enable for address and data synchronization applications • Eight edge-triggered D flip-flops

ABT374C

Contextual Info: 374C 53 National m A Semiconductor 54ABT/74ABT374C Octal D-Type Flip-Flop with 1 31-STATE Outputs General Description The 'ABT374C is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and TRI-STATE outputs for bus-oriented applications. A buffered Clock CP and Output

MC74AC273

Abstract: MC74AC373
Contextual Info: M OTOROLA M C74A C 374 M C 74A C T374 O ctal D -iy p e Flip-Flop w ith 3 -S ta te O utputs OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS The MC74AC374/74ACT374 is a high-speed, low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for busoriented applications. A buffered Clock CP and Output Enable (OE) are common

Contextual Info: S E M I C O N D U C T O R tm 74ABT374 Octal D-Type Flip-Flop with General Description The ABT374 is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-STATE outputs for bus-oriented applications. A buffered Clock CP and Output

F10135

Abstract: F10535 fairchild ECL
Contextual Info: F10135~* F 1 0 5 3 5 ^ F10K VOLTAGE COMPENSATED ECL DUAL JK FLIP-FLOP DESCRIPTION - The F10135 and F10535 are Dual Master/Slave DC Coupled Flip­ Flop. Asynchronous Clear Direct CD and Set Direct (SD) are provided and override the clock. The output states of each flip-flop change on the LOW to HIGH transition of

CP12A-1

Contextual Info: M MOTOROLA M ilitary 54LS112A D u a l J -K Flip-Flop W ith C le a r an d Pre se t ELECTRICALLY TESTED PER: MIL-M-38510/30103 The 54LS112A dual flip-flop features individual J, K, clock, and asyn­ chronous set and clear inputs to each flip-flop. When the clock goes

Contextual Info: Revised August 1998 SE M IC O N D U C TO R TM 74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX112 is a dual J-K flip-flop. Each flip-flop has inde£endent J, K, PRESET, CLEAR, and CLOCK inputs with Q,

386D

Abstract: 74AC AC175
Contextual Info: March 1993 Semiconductor 54AC/74AC175 • 54ACT/74ACT175 Quad D Flip-Flop General Description Features The ’A C /’ACT175 is a high-speed quad D flip-flop. T he d e ­ vice is useful fo r general flip-flop requirem ents w here clock and clea r inputs are com m on. The inform ation on the D