FLIP-FLOP RS Search Results

Contextual Info: a s OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS £0 $ DESCRIPTION The T54LS374/T74LS374 is a high-speed, lowpower Octal D-type Flip-Flop featuring separate Dtype inputs for each flip-flop and 3-state outputs for oriented applications. A buffered Clock CP and

Contextual Info: 3.3 V CMOS 10-BIT FLIP-FLOP WITH DUAL OUTPUTS, 3-STATE OUTPUTS AND BUS-HOLD IDT74ALVCH162820 DESCRIPTION: FEATURES: This 10-bit flip-flop is built using advanced dual metal CMOS technology. The ALVCH162820 is an edge-triggered D-type flip-flop. On the positive transition of the clock CLK

Contextual Info: 74LS377 S ignetics Flip-Flop Octal D Flip-Flop With Clock Enable Product Specification Logic Products FEATURES • Ideal for addressable register applications • Clock Enable for address and data synchronization applications • Eight edge-triggered D flip-flops

F10135

Abstract: F10535 fairchild ECL
Contextual Info: F10135~* F 1 0 5 3 5 ^ F10K VOLTAGE COMPENSATED ECL DUAL JK FLIP-FLOP DESCRIPTION - The F10135 and F10535 are Dual Master/Slave DC Coupled Flip­ Flop. Asynchronous Clear Direct CD and Set Direct (SD) are provided and override the clock. The output states of each flip-flop change on the LOW to HIGH transition of

Contextual Info: 3.3V CMOS 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: - CMOS technology. The ALVCH162821 device can be used as two 10-bit flip-flops or one 20-bit flip-flop. The 20-bit flipflops are edge-triggered D-type flip-flops. On the positive

ZD607

Abstract: 721a k40z
Contextual Info: 3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD DESCRIPTION: FEATURES: - This 20-bit flip-flop is built using advanced dual metal CMOS technology. The 20 flip-flops of the LVCH16721A are edgetriggered D-type flip-flops with qualified clock storage. On the

SNJ54LS273J

Abstract: 32501BRA SNJ54LS273 SN54LS273J 6 pin 2D 1002 2D 1002 integrated circuit
Contextual Info: SN54273, SN54LS273, SN74273, SN74LS273 OCTAL D-TYPE FLIP-FLOP WITH CLEAR SDLS090 – OCTOBER 1976 – REVISED MARCH 1988 • • • • Contains Eight Flip-Flops With Single-Rail Outputs Buffered Clock and Direct Clear Inputs Individual Data Input to Each Flip-Flop

Contextual Info: S E M IC O N D U C T O R 74LVX374 Low Voltage Octal D Flip-Flop w ith 3-STATE O utputs General Description Features The LVX374 is a high-speed, low -pow er octal D-type flip-flop featuring separate D-type inputs fo r each flip-flop and 3-STATE outputs fo r bus-oriented applications. A buffered

Contextual Info: R C H U - P S E M IC O N D U C T O R tm DM74LS534 Octal D-Type Flip-Flop With General Description The ’LS534 is a high speed, low pow er octal D -type flip-flop featuring separate D -type inputs for each flip-flop and 3-STATE outputs for bus oriented applications. A buffered

Contextual Info: SY10E131 SYNERG Y 4-BIT D FLIP-FLOP OTlUltlJl SEMICONDUCTOR DESCRIPTION FEATURES • 1100 MHz min. toggle frequency. The SY10E/100E/101E131 is a high speed quad master-slave D-type flip- flop with differential outputs designed for use in new high performance ECL systems. The flip-flops may be individually

Contextual Info: SN74LV4046A HIGH-SPEED CMOS LOGIC PHASE-LOCKED LOOP WITH VCO www.ti.com SCES656C – FEBRUARY 2006 – REVISED APRIL 2007 FEATURES • • • • • • Choice of Three Phase Comparators – Exclusive OR – Edge-Triggered J-K Flip-Flop – Edge-Triggered RS Flip-Flop

MS-012-AB

Abstract: 74ALS 74ALS373 74ALS373D 74ALS373N 74ALS374 74ALS374D 74ALS374N TEXTOOL zif 40 pin socket
Contextual Info: Signetics 74ALS373, 74ALS374 Latch/Flip-Flop ALS Products FEATURES 74ALS373 Octal Transparent Latch 3-State 74ALS374 Octal D Flip-Flop (3-State) Product Specification • 8-bit transparent latch-'A LS373 • 8-bit positive edge triggered register-'A LS374

LW046A

Contextual Info: SN74LV4046A HIGH-SPEED CMOS LOGIC PHASE-LOCKED LOOP WITH VCO www.ti.com SCES656C – FEBRUARY 2006 – REVISED APRIL 2007 FEATURES • • • • • • Choice of Three Phase Comparators – Exclusive OR – Edge-Triggered J-K Flip-Flop – Edge-Triggered RS Flip-Flop

LW046A

Abstract: CD74HC4046 CD4046b A115-A C101 74lv4046 cd4046b application
Contextual Info: SN74LV4046A HIGH-SPEED CMOS LOGIC PHASE-LOCKED LOOP WITH VCO www.ti.com SCES656A – FEBRUARY 2006 – REVISED FEBRUARY 2006 FEATURES • • • • • • • Choice of Three Phase Comparators – Exclusive OR – Edge-Triggered J-K Flip-Flop – Edge-Triggered RS Flip-Flop

16PIN

Abstract: 74LS109 TC74HC109AF TC74HC109AFN TC74HC109AP
Contextual Info: TOSHIBA TC74HC109AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC109AP, TC74HC109AF, TC74HC109AFN Note The JEDEC SOP (FN) is not available in DUAL J - K FLIP-FLOP WITH PRESET AND CLEAR Japan The TC74HC109A is a high speed CMOS J - K FLIP FLOP

Contextual Info: TOSHIBA TC74HC109AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC109AP, TC74HC109AF, TC74HC109AFN DUAL J - K FLIP-FLOP WITH PRESET AND CLEAR Note The JEDEC SOP (FN) is not available in Japan The TC74HC109A is a high speed CMOS J - K FLIP FLOP

k1412

Contextual Info: TOSHIBA TC74HC109AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC109AP, TC74HC109AF, TC74HC109AFN DUAL J - K FLIP-FLOP WITH PRESET AND CLEAR Note The JEDEC SOP (FN) is not available in Japan The TC74HC109A is a high speed CMOS J - K FLIP FLOP

Contextual Info: TOSHIBA TC74VCX162374FT TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74VCX162374FT LOW-VOLTAGE 16-BIT D-TYPE FLIP-FLOP WITH 3.6 V TOLERANT INPUTS AND OUTPUTS The TC74VCX162374FT is a high performance CMOS 16-bit D-TYPE FLIP FLOP. Designed for use in 1.8, 2.5 or 3.3 Volt

Contextual Info: 3.3V CMOS 32-BIT IDT74LVCH32374A EDGE TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS, INFORMATION 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: - The LVCH32374A 32-bit edge-triggered D-type flip-flop is built using advanced dual metal CMOS technology. This high­

CD4013B datasheet

Abstract: 175C 300C CD4013B CD4013BM JM4013BBCA JM4013BBDA
Contextual Info: MICROCIRCUIT DATA SHEET Original Creation Date: 07/16/99 Last Update Date: 11/17/99 Last Major Revision Date: 07/16/99 MJCD4013B-X REV 1A0 BUFFERED DUAL D FLIP-FLOP General Description The CD4013B buffered dual D flip-flop is a monolithic complementary MOS CMOS integrated

Contextual Info: 3.3V CMOS 32-BIT IDT74LVCH32374A EDGE TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS, INF0RMATI0N 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: - The LVCH32374A 32-bit edge-triggered D-type flip-flop is built using advanced dual metal CMOS technology. This high­

C3317

Abstract: L1190 CY7331
Contextual Info: Asynchronous Registered EPLD Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coming from the I/O pin — Independent product term set, reset, and clock inputs on all

Contextual Info: INTEGRATED T O SH IB A TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT CIRCUIT TECHNICAL TC74AC74P/F/FN/FS DATA SILICON MONOLITHIC DUAL D -TYP E FLIP FLOP WITH PRESET AND CLEAR The TC74AC74 is an advanced high speed CMOS D - FLIP FLOP fabricated with silicon gate and double - layer metal

7c331-35

Contextual Info: s :^é= , CY7C331 •jS QYPRESS -■ W SEMICONDUCTOR Asynchronous Registered EPLD Features • TVelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coining from the I/O pin — Independent product term set,