EX128 Search Results

actel cqfp 84

Abstract: A1010B ACTEL FBGA 144
Contextual Info: v3.0 Package Options: User I/Os per Package C om m e r c i a l / I nd us t r i a l D ev i c e s A54SX16 A54SX16P A54SX32 130 175 175 174 81 81 81 A54SX08 A54SX72A SX A54SX32A A54SX16A 44 A54SX08A PLCC SX-A eX256 Pins eX128 Package eX64 eX 68 84 PQFP 69 100

LAYOUT FUSE

Abstract: actel ex128 f actel tq64
Contextual Info: A c t e l ’s e X F P G A s Enabling the “Wired” Lifestyle eX Family Selector Guide eX64 eX128 eX256 3,000 6,000 12,000 Dedicated Registers 64 128 256 • Standby/Static Current 2mA Combinatorial Cells 128 256 512 • Small footprint Maximum User I/Os

40B5

Abstract: 42B2 RT54SX-S TQ100
Contextual Info: v4.1 eX Family FPGAs FuseLock Leading Edge Performance • • • • • 240 MHz System Performance 350 MHz Internal Performance 3.9 ns Clock-to-Out Pad-to-Pad • • • Specifications • • • • • 3,000 to 12,000 Available System Gates Maximum 512 Flip-Flops (Using CC Macros)

Silicon Sculptor II

Abstract: 40B5 42B2 RT54SX-S TQ100 180-pin
Contextual Info: v4.3 eX Family FPGAs FuseLock Leading Edge Performance • • • • • 240 MHz System Performance 350 MHz Internal Performance 3.9 ns Clock-to-Out Pad-to-Pad • • • Specifications • • • • • 3,000 to 12,000 Available System Gates Maximum 512 Flip-Flops (Using CC Macros)

UART 8251

Abstract: 8251 uart in vhdl code 8251 uart vhdl 8251 uart verilog code for baud rate generator vhdl code for a 9 bit parity generator verilog code for 8251 vhdl code for uart vhdl ODD parity generator A42MX09
Contextual Info: v5.1 CoreUART P ro d u ct S u m m a r y S y n t h es is a n d S im u la t io n S u p po r t I n t en d ed U se • Synthesis: Exemplar, Synplicity, Design Compiler, FPGA Compiler, FPGA Express • Basic Interface to Industry Standard UART Controllers • Embedded Systems for Sharing Data between Devices

EX256-TQ100

Contextual Info: Revision 10 eX Family FPGAs Leading Edge Performance • 240 MHz System Performance • 350 MHz Internal Performance • 3.9 ns Clock-to-Out Pad-to-Pad Specifications • 3,000 to 12,000 Available System Gates • Maximum 512 Flip-Flops (Using CC Macros)

ESD-S3.1

Abstract: IC SEM 2005 RTSX32SU TM3015 TM3015.7 transistor N3B cmos esd sensitivity ionizer A54SX08A A54SX16A
Contextual Info: Application Note AC233 Electro-Static Discharge Introduction All electronic integrated circuit IC devices are susceptible to damage from static electricity or electrostatic discharge (ESD). While some devices can withstand thousands of volts of ESD before damage, others

ACEQ100

Abstract: actel flashpro3 schematic actel a40mx02 actel EX128 TQ100 Actel A40MX04 FlashPro3 FG144 engine control module arm7 embedded c programming examples FG256
Contextual Info: Automotive Solutions FROM CONCEPT TO PRODUCTION Key Features Actel, the world’s leading supplier of high-reliability FPGAs, now offers the — Nonvolatile, High-Reliability industry’s broadest automotive product portfolio that addresses the unique needs of vehicle designers. FPGAs are being used today in under-the-hood

Contextual Info: Revision 5 ex Automotive Family FPGAs Specifications • 3,000 to 12,000 Available System Gates • Maximum 512 Flip-Flops Using CC Macros • 0.22 m CMOS Process Technology • Up to 132 User-Programmable I/O Pins Features • Live on Power-Up • No Power-Up/Down Sequence Required for Supply

CS180

Abstract: RT54SX-S TQ100 actel EX128 TQ100 actel package mechanical drawing EX256-TQ100
Contextual Info: v3.0 eX Family FPGAs Le a di n g E d ge P er f o r m a n ce • 240 MHz System Performance Sp e ci f i c a t i on s • Individual Output Slew Rate Control • 2.5V, 3.3V, and 5.0V Mixed Voltage Operation with 5.0V Input Tolerance and 5.0V Drive Strength • Software Design Support with Actel Designer Series and

Contextual Info: v3.0 eX Automotive Family FPGAs FuseLock Specifications • • • • • 3,000 to 12,000 Available System Gates Maximum 512 Flip-Flops Using CC Macros 0.22µm CMOS Process Technology Up to 132 User-Programmable I/O Pins • • • • Features • •

Contextual Info: v3.1 eX Automotive Family FPGAs FuseLock Specifications • • • • • 3,000 to 12,000 Available System Gates Maximum 512 Flip-Flops Using CC Macros 0.22µm CMOS Process Technology Up to 132 User-Programmable I/O Pins • • • • Features • •

Contextual Info: v3.0 eX Automotive Family FPGAs FuseLock Specifications • • • • • 3,000 to 12,000 Available System Gates Maximum 512 Flip-Flops Using CC Macros 0.22µm CMOS Process Technology Up to 132 User-Programmable I/O Pins • • • • Features • •

EX256-TQ100

Contextual Info: Advanced v0.3 eX Family FPGAs Le a di n g E d ge P er f o r m a n ce • Configurable Weak-Resistor Pull-up or Pull-down for Tristated Outputs at Power Up • 240 MHz System Performance • 4.2 ns Clock-to-Out Pad-to-Pad • 3,000 to 12,000 Available System Gates

QFN108

Abstract: QFN-132 kl1-v1 208 pin rqfp drawing qfn132 RT3PE3000L CQ256 DIMENSIONS pqfp 100 actel package mechanical drawing Actel A40MX04 PBGA 23X23 0.8 pitch
Contextual Info: v 11. 2 Package Mechanical Drawings Ceramic Pin Grid Array 84-Pin CPGA Top View 0.050" ± 0.010" Pin #1 ID 0.045" 0.055" 0.015" 0.018" ± 0.002" 0.100" BSC 1.100" ± 0.020" square 0.072" 0.088" L 0.120" 0.140" Side View K J H G F 1.000" BSC E D C B A 1 2 3

LE79Q2281

Abstract: 1N6761-1 2N2369AU 2N2907AUB BR17 datasheet transistor SI 6822 Dimming LED aplications Dimming LED Driver aplications GC4600 IC ZL70572
Contextual Info: Product Portfolio 2013-2014 ng-edge Embed Power Matters. About Microsemi Microsemi Corporation is a leading provider of semiconductor solutions differentiated by power, security, reliability and performance. The company concentrates on providing solutions for applications where power matters, security

Actel a1280

Abstract: BP-1710 ACTEL A1010 rt1280 ACTEL A1010A Silicon Sculptor II bp1710 RT54SX72SU Actel A1020 Actel a1225xl
Contextual Info: Application Note AC225 Programming Antifuse Devices Introduction This document provides an overview of the various programming options available for the Actel antifuse families. In addition, it provides helpful information relating to programming failures, including measures

RT54SX72SCQ208

Abstract: A42MX16 RT54SX32S-CQ208 CQ208 CQ256
Contextual Info: v3.0 Component Selector Guide PCI 5.0 Volt Tolerant — 5 Volt I/O — Yes Yes Yes — — Yes 3.3 Volt I/O 3,000 2.5 Volt I/O Gates 36 JTAG I/O User I/O C, I SRAM Bits Screening –F, Std, –P Wide Decodes Speed Grade CS49 Flip-Flops/Dedicated Max Package

PMX32

Abstract: pqfp 3.2mm footprint a54sx72a
Contextual Info: Actel FPGA Selector Guide System Gates Typical Gates Logic Modules Dedicated FlipFlops Max FlipsFlops SRAM Bits Max I/O Available 2.5V CMOS Drive 3.3V CMOS Drive 5V CMOS Drive 5V Tolerant Inputs 3.3V PCI I/O 5V PCI I/O Slew Rate Control Routed Clocks HardWired

Contextual Info: v3.0 eX Family FPGAs Le a di n g E d ge P er f o r m a n ce • 240 MHz System Performance Sp e ci f i c a t i on s • Individual Output Slew Rate Control • 2.5V, 3.3V, and 5.0V Mixed Voltage Operation with 5.0V Input Tolerance and 5.0V Drive Strength • Software Design Support with Actel Designer Series and

antifuse programming technology

Abstract: EX256-TQ100
Contextual Info: Advanced v0.3 eX Family FPGAs Le a di n g E d ge P er f o r m a n ce • Configurable Weak-Resistor Pull-up or Pull-down for Tristated Outputs at Power Up • 240 MHz System Performance • 4.2 ns Clock-to-Out Pad-to-Pad • 3,000 to 12,000 Available System Gates

Contextual Info: Advanced v.2 eX Family FPGAs Fe a t ur es • Single-Chip Solution • High-Performance, Low-Power Antifuse FPGA • 240 MHz System Performance • Nonvolatile • 4.2 ns Clock-to-Out Pin-to-Pin • Live on power up • Very Low Power Consumption • Secure Programming Technology Prevents Reverse

EX256-TQ100

Contextual Info: v2.0.1 eX Family FPGAs Le a di n g E d ge P er f o r m a n ce • Configurable Weak-Resistor Pull-up or Pull-down for Tristated Outputs at Power Up • 240 MHz System Performance • 3.9 ns Clock-to-Out Pad-to-Pad • 3,000 to 12,000 Available System Gates

Contextual Info: v4.2 eX Family FPGAs FuseLock Leading Edge Performance • • • • • 240 MHz System Performance 350 MHz Internal Performance 3.9 ns Clock-to-Out Pad-to-Pad • • • Specifications • • • • • 3,000 to 12,000 Available System Gates Maximum 512 Flip-Flops (Using CC Macros)