A54SX32 Search Results

RT54SX72S

Abstract: RT54SX-S voter PAR64 REQ64 TM1019 CQFP256
Contextual Info: Advanced v0.2 RT54SX-S RadTolerant FPGAs for Space Applications Sp e ci a l F ea t ur es f o r Sp a ce • First Actel FPGA Designed Specifically for Space Applications • Up to 2,012 Additional SEU Hardened Flip-Flops Eliminate Software TMR Necessity LETth > 40, GEO SEU Rate <

A54SX16A

Abstract: A54SX08 A54SX08A A54SX16 A54SX32 A54SX32A A54SX72A PAR64 REQ64 antifuse programming technology
Contextual Info: Preliminary v1.2 SX-A Family FPGAs Le a di n g- E d ge P er f o r m a n ce • Configurable I/O Support for 3.3V/5.0V PCI, 5.0V TTL, and 2.5 V/3.3V LVTTL • 2.5V, 3.3V, and 5.0V Mixed Voltage Operation with 5.0V Input Tolerance and 5.0V Drive Strength • Configurable Weak-Resistor Pull-up or Pull-down for

A54SX32A

Abstract: A54SX72A PAR64 REQ64 RT54SX-S CQFP 208 PIN
Contextual Info: v2.0 HiRel SX-A Family FPGAs Features and Benefits • Leading Edge Performance • • • • • • • • • • • 215 MHz System Performance Military Temperature 5.3 ns Clock-to-Out (Pin-to-Pin) (Military Temperature) 240 MHz Internal Performance (Military Temperature)

Contextual Info: Preliminary v 1 .2 54SX Family FPGAs RadTolerant and HiRel Features • 100%Resource Utilization with 100%Pin Locking Rad T o lera nt 54SX Family • Mixed Voltage Support— 3.3V Operation with 5.0V Input • TestedTotal Ionizing Dose TID Survivability Level

RTSX72

Contextual Info: v2.2 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case

208-Pin CQFP

Abstract: Actel PQFP208 RTSX32
Contextual Info: v2.1 SX Family FPGAs RadTolerant and HiRel Features High Density Devices • • • RadTolerant SX Family • • • • • • Tested Total Ionizing Dose TID Survivability Level Radiation Performance to 100 Krads (Si) (ICC Standby Parametric) Devices Available from Tested Pedigreed Lots

diode 2U 66

Contextual Info: v5.1 SX-A Family FPGAs Leading-Edge Performance • • • 250 MHz System Performance 350 MHz Internal Performance • • • Specifications • • • • • • 12,000 to 108,000 Available System Gates Up to 360 User-Programmable I/O Pins Up to 2,012 Dedicated Flip-Flops

A54SX72

Abstract: actel cqfp 84
Contextual Info: Advanced v1.1 HiRel SX-A Family FPGAs Le a di n g E d ge P er f o r m a n ce • Cold-Sparing Capability • 215 MHz System Performance Military Temperature • Slow Slew Rate Option • 5.3 ns Clock-to-Out (Pin-to-Pin) (Military Temperature) • QML Certified Devices

54SX

Abstract: A54SX08 A54SX16 A54SX32 PAR64 REQ64 38VCC 54SX16P
Contextual Info: v3.0.1 54SX Family FPGAs Lead ing E dge P er f or m ance Feat ur es • 320 MHz Internal Performance • 66 MHz PCI • 3.7 ns Clock-to-Out Pin-to-Pin • CPLD and FPGA Integration • 0.1 ns Input Set-Up • Single Chip Solution • 0.25 ns Clock Skew • 100% Resource Utilization with 100% Pin Locking

C4466

Abstract: FG484 CQ256 FG144 D1425 ACTEL SI-SXA-APATQ100-A-KIT SI-SX72-ACQ256SFG484 A54SX72A C4002
Contextual Info: 0HFKDQLFDO 'UDZLQJV IRU WKH $GDSWHU %RDUG S/N Package Device Actel Part Number 1 CQ256 to FG484 For A54SX72A and RT54SX72S devices SI-SX72-ACQ256SFG484 Ironwood Electronics Part Number: CQ256 to FG484 adapter for SX32 And SX72.pdf C4002

Contextual Info: Actel’s SX-A Family of FPGAs Price/Performance Leader in Programmable Logic Logic designers face many problems trying to achieve performance on programmable logic devices available today, resulting in increased total costs for product development. Even when performance requirements are

FBGA-484

Abstract: FBGA484 ACTEL FBGA 144
Contextual Info: Actel FPGA Selector Guide Ava i l a b l e Co m m e rc i a l & In d u s t r i a l De v i c e s 54SX-A 54SX 40MX 42MX ProASIC System Typical Gates Gates Logic Max SRAM Max I/O 2.5V CMOS 3.3V CMOS 5V CMOS 5V Tolerant 3.3V 5V Slew Rate Flip Flops Bits Available

Pl84

Contextual Info: Component Selector Guide April 1999 1999 Actel Corporation 1 Package Speed Grade SRAM Bits JTAG I/O 3.3 Volt 5 Volt PCI 5.0 Volt Tolerant at 3.3V VQ100 Std, –1, –2, –3 78 8,000 256 512 — — Yes Yes — — Yes PQ208 Std, –1, –2, –3 129 8,000

actel cqfp 84

Abstract: actel a1020b RT1425A actel a1010b actel 172 cqfp
Contextual Info: Package Options: User I/Os per Package January 1999 1999 Actel Corporation 1 Commercial/Industrial Devices RQFP VQFP TQFP BGA CPGA CQFP 129 172 172 125 176 34 57 69 69 72 83 72 72 57 125 125 152 125 176 176 202 176 176 202 57 78 112 129 78 144 78 112 144

SM84PG-ACTEL

Abstract: A1240XL SM-10 SM68P-ACTEL SM160PQ-ACTEL SM132CQ-ACTEL A42MX36 1200XL SM176TQ-ACTEL A1010DXV
Contextual Info: Silicon Sculptor - Adapter Module Selector Guide Page 1 of 3 BACK Adapter Module Selector Guide Package Types: BG - Plastic Ball Grid Array CQ - Ceramic Quad Flat Pack PG - Ceramic Pin Grid Array PL - Plastic J-Leaded Chip Carrier Device Type A1010B A1010B

A40MX04

Abstract: ACTEL FBGA 144 A42MX09 A42MX24 A42MX16
Contextual Info: Actel FPGA Selector Guide Commercial & Industrial Devices eX SX-A SX MX ProASIC System Typical Gates Gates Logic Dedicated Max Modules Flip-Flops Flip-Flops SRAM Max I/O 2.5V CMOS 3.3V CMOS 5V CMOS 5V Tolerant 3.3V 5V Slew Rate Routed Hardwired Bits Available

Contextual Info: Application Note Actel SX-A and RT54SX-S Devices in Hot-Swap and Cold-Sparing Applications I n tro du ct i on All of Actel’s FPGAs are nonvolatile, meaning they are live at power up, and do not require a configuration device. This makes Actel’s chips ideal candidates for hot-swap and

ms-029

Abstract: FBGA1152
Contextual Info: v6.0 Package Characteristics and Mechanical Drawings P a ck ag e Th e r m al C h ar ac te ri st i cs Package Type Ceramic Pin Grid Array CPGA Ceramic Quad Flat Pack (CQFP) – cavity up – cavity up w/ heat sink Plastic Leaded Chip Carrier (PLCC) Plastic Quad Flat Pack (PQFP)

ACTEL CROSS REFERENCE

Abstract: XC95144 equivalent SX32a OR2C04A epm7064s cross reference epf10k200s Actel A40MX04 2032VE
Contextual Info: Actel Cross Reference Guide Competitor Device Max I/Os Actel Solution Max I/Os Actel Solution Competitor Device XC4000V - 2.5V XC4000E - 5.0V XC4003E Competitor Device 80 Max I/Os Actel Solution Competitor Competitor Device Device Voltage Max Max Flip-flops

CQ256

Abstract: CQ208 CQ84 A32200DX PG176 RH1020B CQ196 CI624 A42MX36 dimensions A1240XL
Contextual Info: Actel Hermetic Package Mechanical Cavity, weight, Lid size and Heat Sink size configuration Package Devices Cavity CQ84 CQ84 CQ84 CQ84 A1020B RT1020B RH1020B A32100DX Up Up Up Up Weight (grams) 2.2 2.2 2.2 2.2 Lid (mils) 520x520 520x520 520x520 550x550 Head Sink

vhdl code for watchdog timer of ATM

Abstract: zilog 3570 z80 vhdl vhdl code for a 16*2 lcd vhdl code for rs232 receiver vhdl code for ethernet csma cd VHDL rs232 driver 1553b VHDL A24D16 vme vhdl
Contextual Info: IP Solutions Improve Time-to-Market and Reduce Design Risk Actel’s IP Solutions — Complement Actel’s Nonvolatile, Secure, Low-Power Antifuse and Flash FPGAs — Available in Evaluation, RTL, and Netlist Formats — Offer Single- and Multiple-Use Licenses

FBGA-484

Abstract: A54SX32A-CQ256 actel FG484 package mechanical drawing B22 filament base CQ256 land pattern QFP 208 SX72 A54SX32A-FG484 silicone paste p4 FG484
Contextual Info: Actel CQFP – FBGA484 Adapter Boards SI-SX32-ACQ256SFG484 and SI-SX72-ACQ256SFG484 Contents 1). Introduction 2). Appendix A – SI-SX32-ACQ256SFG484 Mechanical Drawing and Assembly instructions 3). Appendix B – SI-SX72-ACQ256SFG484 Mechanical Drawing and Assembly

RT54SX32-1CQ208B

Abstract: qml-38535 A54SX32 vpp vks A54SX32 A54SX32-1 actel 5962 IC TTL 7460
Contextual Info: REVISIONS LTR A DESCRIPTION Added devices 03 and 04, editorial changes to table I and the appropriate paragraphs throughout the document. ksr DATE YR-MO-DA APPROVED 00-03 03 Raymond Monnin REV SHEET REV A A A A A A A A A A A A SHEET 15 16 17 18 19 20 21

A54SX72

Contextual Info: Advanced v.1 HiRel SX-A Family FPGAs Le a di n g E d ge P er f o r m a n ce • 100% Military Temperature Tested –55°C to +125°C • 215 MHz System Performance (Military Temperature) • 66 MHz PCI Compliant • 5.3 ns Clock-to-Out (Pin-to-Pin) (Military Temperature)