RTSX32SU Search Results

rt54sx32su

Abstract: RTSX72 RTSX32SU RTSX72-S
Contextual Info: Advanced v0.1 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case

Contextual Info: v2 . 1 RTSX-S RadTolerant FPGAs Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case

RTSX32su

Abstract: Actel a54sx72a tid Silicon Sculptor II
Contextual Info: v2.2 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case

RTSX32su

Abstract: RTSX32SU CQ84 RTSX72SU
Contextual Info: v2.0 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case

ESD-S3.1

Abstract: IC SEM 2005 RTSX32SU TM3015 TM3015.7 transistor N3B cmos esd sensitivity ionizer A54SX08A A54SX16A
Contextual Info: Application Note AC233 Electro-Static Discharge Introduction All electronic integrated circuit IC devices are susceptible to damage from static electricity or electrostatic discharge (ESD). While some devices can withstand thousands of volts of ESD before damage, others

RTSX32SU

Abstract: RTSX32 PQFP die size C5249 bst r16 166 P790 actel 1020 datasheet A54SX72A CC256 CQ208
Contextual Info: Advanced v0.3 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case

RTSX72

Abstract: RTSX72SU A54SX72A TID "tristate buffer" A54SX32S-PQ208 RT54SXproto
Contextual Info: Advanced v0.2 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case

RTSX32SU CQ84

Abstract: RT3PE3000L CQ256 CQFP 256 PIN actel A54SX32A SEU RT3PE600L Cqfp256 RTAX2000 ACTEL CCGA 624 mechanical rtax2000sl aircraft logic gates
Contextual Info: System-Critical FPGAs Product Catalog November 2009 Taking Designs from Earth to Outer Space Whether you’re designing for sea-level or 2,000,000 miles into space, Actel’s high-reliability, low-power FPGAs are your best choice. With a history of providing the most reliable, robust, low-power flash and antifuse-based FPGAs in

RTSX32SU

Abstract: RTSX32SU CQ84 rtsx72su RTSX32 RTSX-SU 1/RTSX32su CC256 PRB-1 actel 1020 datasheet CG624
Contextual Info: Revision 7 RTSX-SU RadTolerant FPGAs UMC FuseLock Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case

QFN108

Abstract: QFN-132 kl1-v1 208 pin rqfp drawing qfn132 RT3PE3000L CQ256 DIMENSIONS pqfp 100 actel package mechanical drawing Actel A40MX04 PBGA 23X23 0.8 pitch
Contextual Info: v 11. 2 Package Mechanical Drawings Ceramic Pin Grid Array 84-Pin CPGA Top View 0.050" ± 0.010" Pin #1 ID 0.045" 0.055" 0.015" 0.018" ± 0.002" 0.100" BSC 1.100" ± 0.020" square 0.072" 0.088" L 0.120" 0.140" Side View K J H G F 1.000" BSC E D C B A 1 2 3

RTSX32SU

Abstract: RTSX72SU AC251 RT54SX72S RT54SX-S in-rush RTSXSU ACTEL
Contextual Info: Application Note AC251 Power Cycling of RTSX-S Devices Introduction Power cycling may be defined in various terms, based on different applications. In this application note, power cycling refers to consecutive power-up/down sequences of array and I/O voltage supplies of RTSX-S

RTSX32SU CQ84 PROTO

Abstract: RTSX32SU CQ84 RTSX72SU1 SOC 8A fuse smd RTSX32su CG624 thermal expansion
Contextual Info: Revision 9 RTSX-SU Radiation-Tolerant FPGAs UMC Designed for Space • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single Event Upsets (SEU) to LETth > 40 MeVcm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case

RTAX2000S

Abstract: rtax2000 RTSX32SU-CQ208E RTSX32SU-CQ84E 5962-0422101QXC rtax2000s-cq352e 5962-0422102QXC 5962-0422104QNA rtsx32su apa600-cq208b
Contextual Info: DSCC Cross Reference Guide Table 1: Actel Part Numbers to DSCC Drawing Numbers Actel Part Number Devices A1010B A1020B Pin-Package 84-CPGA 84-CPGA 84-CQFP A1240A A1280A 132-CPGA 176-CPGA 172-CQFP A1280XL 176-CPGA 172-CQFP A1425A A1460A A14100A 132-CQFP 207-CPGA

LE79Q2281

Abstract: 1N6761-1 2N2369AU 2N2907AUB BR17 datasheet transistor SI 6822 Dimming LED aplications Dimming LED Driver aplications GC4600 IC ZL70572
Contextual Info: Product Portfolio 2013-2014 ng-edge Embed Power Matters. About Microsemi Microsemi Corporation is a leading provider of semiconductor solutions differentiated by power, security, reliability and performance. The company concentrates on providing solutions for applications where power matters, security

ACTEL CCGA 624 mechanical

Contextual Info: v2 . 0 RTSX-S RadTolerant FPGAs Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case

SMD ARAY

Contextual Info: Revision 6 RTSX-SU RadTolerant FPGAs UMC FuseLock Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case

Contextual Info: Prototyping Microsemi Rad-Tolerant Devices Microsemi™ Prototyping CQFP PACKAGE Aldec RTAX-S/SL Prototyping Adaptors RTAX250S/SL RTAX1000S/SL RTAX2000S/SL RTAX4000S CQ208 CCGA/LGA PACKAGE Aldec and Microsemi have joined together, offering a new, innovative,

AX2000-CQ256

Contextual Info: Power Matters. Spaceflight FPGAs RTAX -S/SL RTAX-DSP RT-ProASIC 3 RTSX-SU The leader in programmable digital logic integration for spaceflight applications. Taking Designs from Earth to Outer Space Whether you’re designing for low earth orbit, deep space, or anything in between, Microsemi’s high reliability, low

RTSX32SU CQ84

Abstract: Silicon Sculptor II RTSX32SU actel 1020
Contextual Info: v2.1 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case

RTSX32SU

Abstract: RTSX32SU CQ84 Actel a54sx72a tid RTSX72SU RTSX-SU actel 1020 Silicon Sculptor II actel 1020 datasheet RT54SX E11213
Contextual Info: v2.2 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case

SM208CQSX-ACTEL

Abstract: RTSX32SU Silicon Sculptor II AC255 RTSX-SU SM208CQSX RTSX32 AFM n silicon sculptor V4491
Contextual Info: Application Note AC255 Recommendations for Programming Actel RTSX-S, RTSX-SU, and SX-A Introduction This technical brief provides programming information and answers common questions regarding the programming of Actel RTSX-S MEC fabricated, now discontinued , RTSX-SU (UMC fabricated), and SX-A

RTSX32SU CQ84 PROTO

Abstract: CQ84 SOC 8A fuse smd RTSX32SU CQ84 rtsx72su RTSX32SU CG624 thermal expansion
Contextual Info: Revision 8 RTSX-SU Radiation-Tolerant FPGAs UMC Designed for Space • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single Event Upsets (SEU) to LETth > 40 MeVcm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case

RTSX72

Contextual Info: v2.2 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case

TSMC 0.18 um MOSfet

Abstract: M38510 10102BCA IDT7204L 5962-8768401MQA 0.18um LDMOS TSMC sl1053 TSMC 0.25Um LDMOS UT63M125BB SMD RTAX250S-CQ208 5962-04221
Contextual Info: DSCC Supplemental Information Sheet for Electronic QML-38535 Specification Details: Date: 9/2/2008 Specification: MIL-PRF-38535 Title: Advanced Microcircuits Federal Supply Class FSC : 5962 Conventional: No Specification contains quality assurance program: Yes