RTAX250S Search Results

Contextual Info: Prototyping Microsemi Rad-Tolerant Devices Microsemi™ Prototyping CQFP PACKAGE Aldec RTAX-S/SL Prototyping Adaptors RTAX250S/SL RTAX1000S/SL RTAX2000S/SL RTAX4000S CQ208 CCGA/LGA PACKAGE Aldec and Microsemi have joined together, offering a new, innovative,

1553b VHDL

Abstract: Actel 1553b fpga 1553B transistor BC 584 MIL-STD-1553B FPGA RT MIL-STD-1553B ACTEL FPGA manchester verilog decoder vhdl code manchester encoder mil-std-1553b SPECIFICATION transistor BC 490
Contextual Info: Core1553BBC MIL-STD-1553B Bus Controller Product Summary • Intended Use • 1553B Bus Controller BC • DMA Backend Interface to External Memory Synthesis and Simulation Support Key Features • • • • • • Supports MIL-STD-1553B Interfaces to External RAM

LGA 478 SOCKET PIN LAYOUT

Abstract: RTAX2000
Contextual Info: v5.2 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg

RTAX2000

Abstract: schematic diagram 2 sc 1020 RTAX1000 RTAX250 Synplify tmr RTAX2000S
Contextual Info: A dv an c ed v0 .5 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 60 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case

RTAX2000

Abstract: TB125 24mA-drive 352-Pin
Contextual Info: RTAX-S RadTolerant FPGAs Detailed Specifications Table 2-1 • I/O Features Comparison I/O Assignment Clamp Diode Hot Insertion 5V Tolerance Input Buffer Output Buffer LVTTL No Yes No Enabled/Disabled 3.3V PCI Yes No Yes1 Enabled/Disabled LVCMOS2.5V No Yes

RTAX2000

Abstract: footprint cqfp 280 RTAX1000S actel cqfp 84
Contextual Info: A dv an c ed v0 .5 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 60 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case

56 pin edac connector

Abstract: PCB footprint cqfp 132 Silicon Sculptor II ACTEL CCGA 624 mechanical
Contextual Info: v2.0 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case

RTAX2000

Abstract: rtax4000 CDB 455 C34 IO358 DIODE SMD V05 128X3
Contextual Info: v5.1 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg

RTAX1000SL

Abstract: RTAX1000S RTAX1000S-SL RTAX250SL RTAX2000SL RTAX2000S RTAX250S RTAX4000S 56 pin edac connector
Contextual Info: RTAX-S/SL RadTolerant FPGAs Detailed Specifications Table 2-1 • I/O Features Comparison I/O Assignment 3.3 V LVTTL Clamp Diode Hot Insertion / Cold Sparing 1 Yes 5V Tolerance Input Buffer Output Buffer No 1 Yes Enabled/Disabled Enabled/Disabled 3.3 V PCI

pressure sensor MATLAB program

Abstract: actel rad pressure sensor 90nm cmos RTAX250S-1000S
Contextual Info: A passion for performance. Digital and Mixed-Signal custom, semi-custom, off-the-shelf designs with Aeroflex Gaisler IP Guaranteed radiation performance QML-V, QML-Q, military, medical, industrial grades Category 1A Trusted Accreditation We connect the real

a2f500m3g

Abstract: vhdl code for 8 bit ODD parity generator
Contextual Info: Core16550 v3.1 HandBook Core16550 v3.1 HandBook Table of Contents Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Supported Device Families . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Contextual Info: Revision 16 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)

actel FG484 package mechanical drawing

Abstract: RTAX2000S-CQ352 actel package mechanical drawing FG484 CQ352 2-CQFP SK-AX2000-CQ352RTFG896 sk-ax FG896 rtax2000* cqfp
Contextual Info: &4 3 WR )%*$ $GDSWHU 6RFNHWV July 2004 Table of Contents Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 CQFP to FBGA Adapter Socket . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

56 pin edac connector

Abstract: RTAX1000 edac 96 pin edac connector 292 CCGA
Contextual Info: v2.1 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case

RTAX2000S-CQ352

Contextual Info: RTAX-S RadTolerant FPGAs Detailed Specifications Table 2-1 • I/O Features Comparison I/O Assignment LVTTL Clamp Diode Hot Insertion / Cold Sparing 5V Tolerance No Yes No Input Buffer Output Buffer Enabled/Disabled 1 3.3 V PCI Yes No Yes Enabled/Disabled

CQ352

Abstract: antifuse
Contextual Info: v2.1 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case

4x1K

Abstract: edac 96 pin edac connector footprint cqfp 132 833 T12
Contextual Info: Advanced v0.5 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 60 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case

Contextual Info: CorePCIF v4.0 Handbook Microsemi Corporation, Mountain View, CA 94043 2014 Microsemi Corporation. All rights reserved. Printed in the United States of America Part Number: 50200087-7 Release: February 2014 No part of this document may be copied or reproduced in any form or by any means without prior written

RTAX1000S-SL

Abstract: RTAX2000 actel PLL schematic LVCMOS25 signal path designer JESD8-11
Contextual Info: Application Note AC310 RTAX-S/SL Clocking Resource and Implementation Introduction Actel's RTAX-S/SL FPGA family offers the most flexible global network scheme of any antifuse-based FPGA to date. This architecture provides eight segmentable chip-wide global networks, and dedicated power-on

RTSX32SU CQ84

Abstract: RT3PE3000L CQ256 CQFP 256 PIN actel A54SX32A SEU RT3PE600L Cqfp256 RTAX2000 ACTEL CCGA 624 mechanical rtax2000sl aircraft logic gates
Contextual Info: System-Critical FPGAs Product Catalog November 2009 Taking Designs from Earth to Outer Space Whether you’re designing for sea-level or 2,000,000 miles into space, Actel’s high-reliability, low-power FPGAs are your best choice. With a history of providing the most reliable, robust, low-power flash and antifuse-based FPGAs in

galois field theory

Abstract: code of encoder and decoder in rs(255,239) in vhd A3P250 APA300 RTAX250S Reed-Solomon Decoder verilog code verilog code for 8 bit shift register theory
Contextual Info: CoreRSENC v2.0 Handbook Actel Corporation, Mountain View, CA 94043 2007 Actel Corporation. All rights reserved. Printed in the United States of America Part Number: 50200106-0 Release: October 2007 No part of this document may be copied or reproduced in any form or by any means without prior written

fpga 1553B

Abstract: 1553b VHDL MIL-STD-1553B FPGA Actel 1553b RT MIL-STD-1553B ACTEL FPGA vhdl code manchester encoder mil 1553b Core1553BRT v3.1 1553 VHDL manchester verilog decoder
Contextual Info: Core1553BRT MIL-STD-1553B Remote Terminal Product Summary • Intended Use • 1553B Remote Terminal RT • DMA Backend Interface to External Memory • Direct Backend Interface to Devices • Space and Avionic Applications • Supports MIL-STD 1553B •

PCI-M32

Abstract: design of dma controller using vhdl application of parity checker vhdl code for parity checker vhdl code it parity generator vhdl code for DMA RTAX250S vhdl code for parity generator 32 bit ALU vhdl code VHDL code for pci
Contextual Info:  Flexible synthesizable VHDL  PCI specification 2.3 compliant  33 MHz performance PCI-M32  32-bit datapath 32-bit/33MHz PCI Master/Target Interface Core  Full bus Master/Target functio-  Zero wait states burst mode nality  Single interrupt support

RTAX2000

Abstract: RTAX2000S RTAX1000SL rtax250 RTAX250SL RTAX4000SL RTAX1000 RTAX-S RTAX1000S-SL rtax250s
Contextual Info: Rev ision 13 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)