RT54SXPROTO Search Results

RT54SXPROTO Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
rt54sx32su Abstract: RTSX72 RTSX32SU RTSX72-S Contextual Info: Advanced v0.1 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case	Original	tm1019 rt54sx32su rtsx72 rtsx32su +1rtsx72-s	PDF
Contextual Info: v2 . 1 RTSX-S RadTolerant FPGAs Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case	Original	tm1019	PDF
RTSX32SU Abstract: RTSX32 PQFP die size C5249 bst r16 166 P790 actel 1020 datasheet A54SX72A CC256 CQ208 Contextual Info: Advanced v0.3 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case	Original	tm1019 rtsx32su rtsx32 pqfp die size +7c5249 bst r16 166 p790 actel 1020 datasheet a54sx72a cc256 cq208	PDF
RTSX72 Abstract: RTSX72SU A54SX72A TID "tristate buffer" A54SX32S-PQ208 RT54SXproto Contextual Info: Advanced v0.2 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case	Original	tm1019 rtsx72 rtsx72su a54sx72a tid +3tristate buffer a54sx32s-pq208 rt54sxproto	PDF
SU 177 Abstract: RTSX32SU A54SX72* radiation Actel a54sx72a tid antifuse A54SX72A CC256 CG624 CQ208 CQ256 Contextual Info: Advanced v0.3 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case	Original	tm1019 su 177 rtsx32su a54sx72* radiation +7actel a54sx72a tid antifuse a54sx72a cc256 cg624 cq208 cq256	PDF
ACTEL CCGA 624 mechanical Contextual Info: v2 . 0 RTSX-S RadTolerant FPGAs Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case	Original	tm1019 actel ccga 624 mechanical	PDF
ACTEL CCGA 624 mechanical Abstract: 208-Pin CQFP Actel a54sx72a tid CCGA -CG 472 Contextual Info: v2 . 2 RTSX-S RadTolerant FPGAs Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case	Original	tm1019 actel ccga 624 mechanical 208-pin cqfp actel a54sx72a tid +1ccga -cg 472	PDF