DRAM ZIP Search Results
DRAM ZIP Result Highlights (5)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
|---|---|---|---|---|---|
| 10110668-101LF | Amphenol Communications Solutions | 10110668-101LF-ZIP 6PVH 16I 4W 1.8MM | |||
| CDCV857ADGGG4 | Texas Instruments | 2.5V SSTL-II Phase Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications 48-TSSOP 0 to 85 |
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| CDCV857ADGGR | Texas Instruments | 2.5V SSTL-II Phase Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications 48-TSSOP 0 to 85 |
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| CDCV857ADGG | Texas Instruments | 2.5V SSTL-II Phase Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications 48-TSSOP 0 to 85 |
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| CDCVF2505DG4 | Texas Instruments | PLL Clock Driver for Synch. DRAM & Gen. Purp. Apps W/Spread Spectrum Compatibility, Power Down Mode 8-SOIC -40 to 85 |
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DRAM ZIP Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
3524CP
Abstract: 2MX40 RAM128KX8 DIP HM624256 HM62832 16Mbit FRAM Dram 168 pin EDO 8Mx8 hm62256 flash 32 Pin PLCC 16mbit HN27C1024
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hb56u132hb56h132hb56u232hb56h232+16 | |
3654P
Abstract: DRAM 4464 jeida dram 88 pin MB814260 4464 dram 1024M-bit 4464 64k dram MB81G83222-008 mb814400a-70 4464 ram
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16m-bit64m-bit68-pin88-pin+14 | |
toshiba toggle mode nand
Abstract: TC518128 TC518129 TC551001 equivalent 551664 TC518512 sgs-thomson power supply Toggle DDR NAND flash jeida 38 norm APPLE A5 CHIP
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64m128m66mhz100mhz200mhz+15 | |
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Contextual Info: M T4C4003J lEG X 4 DRAM M IC R O N 1 MEG DRAM X 4 DRAM DRAM STATIC COLUMN FEATURES PIN ASSIGNMENT (Top View OPTIONS 20-Pin ZIP (DC-1) (DB-2) DQ1 DQ2 WE RAS A9 MARKING • Timing 70ns access 80ns access • Packages Plastic SOJ (300 mil) Plastic ZIP (350 mil) |
OCR Scan |
t4c4003j024-cycle20/26-pin20-pin+1 | |
upd23c8000
Abstract: upd4502161 uPD23C8000X uPD4504161 *D431016 uPD23C16000
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-pc100compliant64mcompliant16m168-pin+7 | |
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Contextual Info: MT4C4003J 1 MEG X 4 DRAM I^IKZROfSI DRAM 1 MEG X 4 DRAM DRAM STATIC COLUMN FEATURES PIN ASSIGNMENT Top View • Industry standard x4 pinout, timing, functions and packages • High-performance, CMOS silicon-gate process • Single +5V ±10% power supply |
OCR Scan |
mt4c4003j225mw024-cycle20-pin | |
RRH cl2
Abstract: BBU RRH
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OCR Scan |
mt4c4001024-cyclemt4c4001j128ms+3 | |
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Contextual Info: [MICRON 256K DRAM MT4C4258 X 4 DRAM 256K X 4 DRAM DRAM STATIC-COLUMN FEATURES • Industry-standard x4 pinout, timing, functions and packages • High-perform ance CM OS silicon-gate process • Single +5V ±10% power supply • Low power, 3mW standby; 175mW active, typical |
OCR Scan |
mt4c4258175mw512-cycle20-pin+1 | |
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Contextual Info: MICRON 256K DRAM MT4C4258 X 4 DRAM 256K X 4 DRAM DRAM STATIC COLUMN FEATURES • Industry standard x4 pinout, timing, functions and packages • High-performance, CMOS silicon-gate process • Single +5V +10% power supply • Low power, 3mW standby; 175mW active, typical |
OCR Scan |
mt4c4258175mw512-cycle20-pin+1 | |
DA 11341
Abstract: B1374 S2026 MT4C4258
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OCR Scan |
mt4c4258512-cycle20-pinmt4c42s0+4 | |
MT4C4258Contextual Info: |v i i c : r o n 256K 256K DRAM MT4C4258 X 4 DRAM 4 DRAM X DRAM STATIC-COLUMN FEATURES PIN ASSIGNMENT Top View • Industry-standard x4 pinout, timing, functions and packages • High-performance CM OS silicon-gate process • Single +5V ±10% power supply |
OCR Scan |
mt4c4258175mw512-cycle20-pin | |
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Contextual Info: MT4C4001 J L 1 MEG X 4 DRAM (M IC R O N DRAM 1 MEG x 4 DRAM DRAM STANDARD OR LOW POWER, EXTENDED REFRESH FEATURES • 1,024-cycle refresh distributed across 16ms (MT4C4001J) or 128ms (MT4C4001J L) • Industry-standard x4 pinout, timing, functions and packages |
OCR Scan |
mt4c4001024-cyclemt4c4001j128ms+2 | |
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Contextual Info: PRELIMINARY MT4C8512/3 5 1 2 K x 8 WIDE DRAM |U|IC=RON 512K WIDE DRAM X 8 DRAM WIDE DRAM FAST-PAGE-MODE FEATURES PIN ASSIGNMENT Top View • Industry-standard x8 pinouts, tim ing, functions and packages • Address entry: ten row-addresses, nine columnaddresses |
OCR Scan |
mt4c8512/3024-cyclemt4c851328-pin+1 | |
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Contextual Info: MT4C1006J 4 MEG X 1 DRAM M IC R O N DRAM 4 MEG X 1 DRAM DRAM STATIC-COLUMN FEATURES • Industry-standard xl pinout, timing, functions and packages • High-performance CMOS silicon-gate process • Single+5V ±10% power supply • Low power, 3mW standby; 275mW active, typical |
OCR Scan |
mt4c1006j275mw024-cycle20-pin | |
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MT4C4001J
Abstract: MT4C4001JDJ-6
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OCR Scan |
bill54100042t4mt4c4001j-t-tt-tt-18+3 | |
TFG11Contextual Info: I^ IIC R O N MT4C1026 X 1 DRAM 1 MEG DRAM 1 MEG X 1 DRAM DRAM STATIC COLUMN FEATURES PIN ASSIGNMENT Top View • Industry-standard x l pinout, timing, functions and packages • High-perform ance CM OS silicon-gate process • Single +5V ±10% power supply |
OCR Scan |
mt4c1026175mw512-cycle18-pin+2 | |
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Contextual Info: PRELIMINARY |W|IC=RC3N 512K M T4C 8 512/3 L WIDE DRAM X 8 512K x 8 DRAM WIDE DRAM LOW POWER, EXTENDED REFRESH FEATURES PIN ASSIGNMENT Top View OPTIONS 28-Pin ZIP (DB-3) 28-Pin SOJ (DC-4) MARKING • Timing 60ns access 70ns access 80ns access • MASKED WRITE |
OCR Scan |
mt4c8513024-cycle128ms350mw+4 | |
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Contextual Info: PRELIMINARY M IC R O N 512K WIDE DRAM MT4C8512/3 L WIDE DRAM X 8 512K x 8 DRAM LOW POWER, EXTENDED REFRESH FEATURES PIN ASSIGNMENT Top View OPTIONS • M ASKED W RITE Not available Available • Packages Plastic SOJ (400 mil) Plastic TSOP (400 mil) Plastic ZIP (375 mil) |
OCR Scan |
mt4c8512/328-pin | |
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Contextual Info: MT4C1006J 4 MEG X 1 DRAM fU |IC =R O N DRAM 4 MEG X 1 DRAM DRAM STATIC COLUMN FEATURES • Industry standard x l pinout, timing, functions and packages • High-performance, CMOS silicon-gate process • Single +5V ±10% power supply • Low power, 3mW standby; 225mW active, typical |
OCR Scan |
mt4c1006j225mw024-cycle20-pin | |
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Contextual Info: M IC R O N 1 MEG DRAM MT4C1026 X 1 DRAM 1 MEG X 1 DRAM DRAM STATIC COLUMN FEATURES • Industry standard x l pinout, timing, functions and packages • High-performance, CMOS silicon-gate process • Single +5V ±10% power supply • Low power, 3mW standby; 175mW active, typical |
OCR Scan |
mt4c1026175mw512-cycle18-pin+1 | |
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Contextual Info: MICRON 256K 256K DRAM X MT4C4258 X 4 DRAM 4 DRAM DRAM STATIC COLUMN FEATURES PIN ASSIGNMENT (Top View • Industry-standard x4 pinout, timing, functions and packages • High-perform ance CM OS silicon-gate process • Single +5V ±10% power supply • Low power, 3m W standby; 175mW active, typical |
OCR Scan |
mt4c4258175mw512-cycle20-pin | |
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Contextual Info: MT4C1004J 4 MEG X 1 DRAM |U |IC = R O N 4 MEG X 1 DRAM DRAM DRAM FAST PAGE MODE FEATURES • Industry standard xl pinout, timing, functions and packages • High-performance, CMOS silicon-gate process • Single +5V ±10% power supply • Low power, 3mW standby; 225mW active, typical |
OCR Scan |
mt4c1004j225mw024-cycle20-pin | |
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Contextual Info: MT4C1006J 4 MEG X 1 DRAM [MICRON DRAM 4 MEG X 1 DRAM DRAM STATI C-COLUMN FEATURES • Industry-standard x l pinout, timing, functions and packages • High-performance CMOS silicon-gate process • Single +5V ±10% pow er supply • Low power, 3mW standby; 275mW active, typical |
OCR Scan |
mt4c1006j275mw024-cycle20-pin | |
cc680Contextual Info: M IC R O N 256K DRAM MT4C4258 X 4 DRAM 256K x 4 DRAM • DRAM STATIC COLUMN FEATURES • Industry standard x4 pinout, timing, functions and packages • High-performance, CM O S silicon-gate process • Single +5V ±10% power supply • Low power, 3mW standby; 175mW active, typical |
OCR Scan |
mt4c4258175mw512-cycle20-pin+3 | |