DQ04 Search Results

bd 640

Abstract: TOP-66 646 af bd640 BO 648 bd648 diode 648 648 diode BD 650 bd650
Contextual Info: 25C D • û23SbOS DQ043CJ1 S I ISIEG . [ PNP Silicon Darlington Transistors SIEMENS A K T I EN GE SE LLS C HA F *91 T-33-31 BD 644 BD 646 0 - BD 648 BD 650 Epibase power darlington transistors 62.5W BD 644, BD 646, BD 648, and BD 6 5 0 are monolithic PNP silicon epibase power darlington

AS8S512K3

Contextual Info: ADVANCED iPEM 64 Mb ASYNC SRAM AS8S2M32PEC 64Mb, 2Mx32 CMOS 3.3V, High Speed Static RAM Integrated Plastic Encapsulated Microcircuit FEATURES DESCRIPTION Integrated Real-Time Memory Array Solution No latency or refresh cycles Parallel Read/Write Interface

Memory

Abstract: FTS8L32512V
Contextual Info: FTS8L32512V 512Kx32 SRAM Module.3.3V FEATURES DESCRIPTION DSP Memory Solution The FTS8L32512V is a high speed, 3.3V, 16 megabit SRAM. The device is available with access times of 12, 15, 17 and 20ns allowing the creation of a no wait state DSP and RISC microprocessor memory solutions.

LUM7/.03125/5/LUM2/.05/5%/900V

Abstract: GLC 555 CCIR601 SPT2110 SPT7852 ITU-R BT.601 720 x 480 "80H decoder" post STP211
Contextual Info: @ SPT SPT2110 NTSC/PAL VIDEO DECODER SIGNAL PROCESSING TECHNOLOGIES FEATURES APPLICATIONS • • • • • • • • • • • • • • • • • • • • • • • NTSC/PAL Video System Compatible Dual 9-Bit Wide Data Paths for Video Processing

74HC74

Abstract: 74hct74 74LS74 pinout 74HC74 pin configuration 74hc74 pin diagram TTL 74hc74 74ls74 timing setup hold Current 74HCT74 QQ042 000M2AA
Contextual Info: GD54/74HC74, GD54/74HCT74 DUAL D-TYPE FLIP-FLOPS WITH PRESET & CLEAR G e n era l D escrip tio n These devices are identical in pinout to the 5 4 /7 4 L S 7 4 . They consist of two D-type flip-flops with individual preset, clear, and clock inputs. Infor­ Pin C o n fig u ra tio n

Contextual Info: Mobile 3rd Generation Intel Core Processor Family, Mobile Intel® Pentium® Processor Family, and Mobile Intel® Celeron® Processor Family Datasheet, Volume 1 of 2 June 2013 Document Number: 326768-006 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED,

Contextual Info: EDI2GG418128V 4x128Kx18, 3.3V Synchronous Flow-Through SRAM CARD EDGE DIMM FEATURES • 4x128Kx18 Synchronous The EDI2GG418128VxxD2 is a Synchronous SRAM, 60 position Card Edge; DIMM 120 contacts module, organized as 4x128Kx64. The module contains four (4) Synchronous Burst Ram Devices,

Contextual Info: EDI8F32123C ^ E D I ELECTRONIC DESIGNS, N C .I 128Kx32 Battery Backed SRAM Module ADVANCED Features 128Kx32 bit CMOS Static Random Access Memory with on-board battery backup 128Kx32 Static RAM CMOS, High Speed Module The EDI8F32123C is a 4 megabit Battery Backed SRAM

socket am3 pinout

Abstract: socket AM2 pinout AM3 Processor Functional INTEL 80960 pipeline architecture 80960RM
Contextual Info: Intel 80960RM I/O Processor • ■ Complies with PCI Local Bus Specification, Revision 2.2 Universal 5 V and 3.3 V PCI Signalling Environment (C-stepping only) Data Sheet Product Features ■ ■ ■ ■ High Performance Intel® 80960JT Core ■ —Sustained One Instruction/Clock Execution

540L

Contextual Info: 80960RM I/O Processor • Complies with PCI Local Bus Specification, Revision 2.1 ■ 5 K PCI Signalling Environment Data Sheet Advance Information Product Features ■ High Performance 80960JT Core ■ — Sustained One Instruction/Clock Execution — 16 Kbyte, Two-Way Set-Associative

1720b

Contextual Info: IBM11M1720B 1M X 72 DRAM MODULE Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module • Optimized for byte-write parity applications • System Performance Benefits: - • 1Mx72 Fast Page Mode DIMM • Performance: -60 -70 Buffered inputs except RAS, Data

Contextual Info: @ LG Semicon. Co. LTD Description Fin Configuration The GM23C16050 high performance read only memory is organized either as 2,097,152 x 8 bit Byte Mode or as 1,048,576 x 16 bit (Word Mode) followed by BHE mode select. The GM23C16050 offers automatic power down controlled by the mask

LGA 1155 Socket PIN diagram

Abstract: LGA 1155 PIN diagram LGA 1155 pin out lga1155 pin diagram E3-1275 intel LGA 1155 PIN diagram 1155 PINmap lga1155 land E3-1260L CATERR Catastrophic Error
Contextual Info: Intel Xeon® Processor E3-1200 Family Datasheet, Volume 1 This is Volume 1 of 2 June 2011 Document Number: 324970-002 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS

MO-47AE

Abstract: ADSP-21060L ADSP-21062L EDI8L32128V EDI8L32512V MPC860 TMS320LC31
Contextual Info: EDI8L32512V White Electronic Designs 512Kx32 SRAM Module.3.3V FEATURES    ADSP-21060L SHARC  ADSP-21062L (SHARC)  Texas Instruments TMS320LC31   The EDI8L32512V is a high speed, 3.3V, 16 megabit SRAM. The device is available with access times of 12, 15, 17 and

cmo 765

Abstract: GR-78 DDR200 DDR266A PC2100 10292003-DNYO-BD9L infineon ddr numbering
Contextual Info: Data Sheet, Rev. 1.2, Jan. 2004 HYS72D16500GR-[7/8]-A HYS72D32501GR-[7/8]-A Low Profile DDR SDRAM-Modules DDR SDRAM Memory Products N e v e r s t o p t h i n k i n g . The information in this document is subject to change without notice. Edition 2004-06 Published by Infineon Technologies AG,

Contextual Info: WEDPF2M64-XBX3 HI-RELIABILITY PRODUCT 2Mx64 3.3V Simultaneous Operation Multi-Chip Package FEATURES • Access Times of 100, 120, 150ns ■ Unlock Bypass Program command • Reduces overall programming time when issuing multiple program command sequences ■ Packaging

EDI8L32512V-AC

Abstract: EDI8L32128V EDI8L32512V MO-47AE MPC860 TMS320LC31 ADSP-21060L ADSP-21062L
Contextual Info: White Electronic Designs EDI8L32512V 512Kx32 SRAM Module.3.3V FEATURES DESCRIPTION DSP Memory Solution The EDI8L32512V is a high speed, 3.3V, 16 megabit SRAM. The device is available with access times of 12, 15, 17 and 20ns allowing the creation of a no wait state DSP and RISC

8l32128c

Abstract: block diagram of of TMS320C4X EDI8L32512C20AI EDI8L32512C TMS320C30 TMS320C32 DSP96002 EDI8L24128C EDI8L32256C
Contextual Info: EDI8L32512C 512K x 32 CMOS High Speed Static RAM FEATURES DESCRIPTION DSP Memory Solution • Motorola DSP96002 • Analog SHARC DSP • Texas Instruments TMS320C3x, TMS320C4x Random Access Memory Array • Fast Access Times: 12*, 15, 17, and 20ns • TTL Compatible Inputs and Outputs

Contextual Info: ïrM ïïrra r^ fN l ]uvyu u l^ jlttj 0-250 AMP v o lja g e p o s it iv e REGULATORS EZ55Z3L TEL: 805-498-2111 FEATURES • • • • • • • External capacitor not required for stability Low dropout performance Fixed models @ 3.3V, 5V, 9V, 12V, 24V

Contextual Info: A p p l ic a t io n N o t e A V A I L A B L E AN 56 f c u X20C05 4K r 512x8 High Speed AUTOSTORE NOVRAM FEATURES D E S C R IP T IO N • Fast Access Time: 35ns, 45ns, 55ns • High Reliability — Endurance: 1,000,000 Nonvolatile Store Operations — Retention: 100 Years Minimum

EDI8L32512V-AC

Abstract: 8L32512V
Contextual Info: EDI8L32512V 512Kx32 SRAM MODULE, 3.3V FEATURES The EDI8L32512V is a high speed, 3.3V, 16 megabit SRAM. The device is available with access times of 12, 15, 17 and 20ns allowing the creation of a no wait state DSP and RISC microprocessor memory solutions. • DSP Memory Solution

M2576

Abstract: renco rl2444 2576S-15 transformer LM2576 LM2576-ADJ LM2576-ADJ*. Circuit Diagram using this IC 671 27130 N4001 diode IC 92112 LM2576T
Contextual Info: & Semiconductor LM2576/LM2576HV Series SIMPLE SWITCHER 3A Step-Down Voltage Regulator Features • 3.3V, 5V, 12V, 15V, and adjustable output versions ■ Adjustable version output voltage range, 1 .23V to 37V 57V for HV version ± 4 % max over line and load conditions

Contextual Info: i m X28C010 1M 128K x 8 Bit 5 Volt, Byte Alterable E2PROM FEATURES DESCRIPTION * Access Time: 120ns * Simple Byte and Page Write — Single 5V Supply — No External High Voltages or Vpp Control Circuits — Self-Timed — No Erase Before Write — No Complex Programming Algorithms

Contextual Info: EDI8L32512C ^ E D I 512KX32 SRAM Module ELECTRONIC DESIGNS, INC 512Kx32 CMOS High Speed Static RAM Features DSP Memory Solution The EDI8L32512C is a highspeed, 5V, 16 megabit SRAM. The device is available with access times of 12,15,17 and 20ns allowing the creation of a no wait state DSP memory