DATA63 Search Results

SuperSPARC

Abstract: Mbus master 250 slave circuit tmx390 STP1091-60
Contextual Info: S un M icroelectronics July 1997 Multi-Cache Controller DATA SHEET Integrated Cache Controller for SuperSPARC D e s c r ip t io n The STP1091 is a high-performance external cache controller for the STP1020 SuperSPARC and STP1021 (SuperSPARC-II) microprocessors. It is used when a large secondary cache or an interface to a non-MBus sys­

Contextual Info: Advance Data Sheet August 1998 LU5M31 Gigabit Ethernet Media Access Controller MAC Overview The LU5M31 is a single-port 1 Gbit/s MAC that incorporates physical coding sublayer (PCS) functionality. The LU5M31 is intended to enhance 10/ 100 Mbits/s Ethernet frame switching, multiple port

clause 22 phy registers

Abstract: 13007 h3 ali 3602 detail of D 13007 K mca exam date sheet 1000BASE-X DS1005 STS-48
Contextual Info: LatticeSC/M Family flexiPCS Data Sheet DS1005 Version 01.9, December 2008 LatticeSC/M Family flexiPCS Data Sheet Table of Contents December 2008 Introduction to flexiPCS .1-1

SMD45

Abstract: SMD34 224 d5 smd zd 15 p240f1 SMD52 SMD46 SMD-42 smd M16 SMD23
Contextual Info: お客様各位 カタログ等資料中の旧社名の扱いについて 2010 年 4 月 1 日を以って NEC エレクトロニクス株式会社及び株式会社ルネサステクノロジ が合併し両社の全ての事業が当社に承継されております。従いまして、本資料中には旧社

an1171

Abstract: sharc ADSP-21xxx ADDRESSING MODES CHN 950 ADSP-21062 ADSP21535 ADSP-21535 ADSP-2188M ADSP-2191 ADSP-TS101S DSM2150F5V
Contextual Info: DSM2150F5V DSM Digital Signal Processor System Memory For Analog Devices DSPs (3.3V Supply) FEATURES SUMMARY • Glueless Connection to DSP – Create state machines, chip selects, simple shifters and counters, clock dividers, delays – Easily add memory, logic, and I/O to the External Port of ADSP-218x, 219x, 2106x,

ADSP-21160 reference manual

Abstract: ADSP-21160 EC Bus
Contextual Info:  ;7(51$/0(025< Figure 8-0. Listing 8-0. Table 8-0. 2YHUYLHZ ([WHUQDO0HPRU\,QWHUIDFH The ADSP-21160 external memory interface has several enhancements over that of the ADSP-2106x. These changes were introduced to improve bus throughput when interfacing to synchronous memories and

CAN BUS

Abstract: ADSP-21160 virpt ADSP-21060
Contextual Info:  08/7,352& 66,1* Table 10-0. Figure 10-0. Listing 10-0. 2YHUYLHZ The ADSP-21160 includes functionality and features that allow the design of multiprocessing DSP systems. These features include distributed, on-chip arbitration for the shared external bus; a unified

Contextual Info: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid

SMD phase shifter 0201

Abstract: ts201S ADSP-TS201SABP-050 ADSP-TS201SABP-060 l3bc
Contextual Info: TigerSHARC Embedded Processor ADSP-TS201S • a KEY FEATURES KEY BENEFITS Up to 600 MHz, 1.67 ns instruction cycle rate 24M bits of internal—on-chip—DRAM memory 25 mm x 25 mm 576-ball thermally enhanced ball grid array package Dual-computation blocks—each containing an ALU, a

interposing relay

Abstract: eQFP 64 footprint csr LPT 2 SPI CSR LPT SPI heraeus pd955 LVD LAMP CONVERTOR MAP SCK 164 SCR SN 104 photo ST72311R ST72511R
Contextual Info: ST72311R, ST72511R, ST72532R 8-BIT MCU WITH NESTED INTERRUPTS, EEPROM, ADC, 16-BIT TIMERS, 8-BIT PWM ART, SPI, SCI, CAN INTERFACES • ■ ■ ■ ■ Memories – 16K to 60K bytes Program memory ROM,OTP and EPROM with read-out protection – 256 bytes E2PROM Data memory

kyx 28

Abstract: hstm 421 mrf 458 MRF 530 sharc ADSP-21xxx architecture A-18 ADSP-21160 matching smit chart diode LT 675 IN 407 ADSP-21106
Contextual Info: ADSP-21160 SHARC DSP Hardware Reference Revision 4.0, June 2009 Part Number 82-001966-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2009 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent

Supersparc

Abstract: IEEE754 STP1021A
Contextual Info: STP1021A July 1997 SuperSPARC -II DATA SHEET SPARC v8 32-Bit Superscalar Microprocessor DESCRIPTION The STP1021A is a new member of the SuperSPARC-II family of microprocessor products. Like its predecessors STP1020N, STP1020 and STP1021 this new part is fully SPARC Version 8 compliant and is completely upward compatible with the earlier SPARC Version 7 implementations running over 9,400 SPARC applications and development

bfp760

Abstract: ADSP-TS201 reverse carry addition WPCT ADSP-21263 C-15 ts101 dsp application note boot kernel for the ADSP-21369 xr120xddddcccc "vector instructions" saturation
Contextual Info: ADSP-TS201 TigerSHARC Processor Programming Reference Revision 1.1, April 2005 Part Number 82-000810-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2005 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express

la 315

Abstract: mp 1038 FY yx 805 led driver A-18 ADSP-21160 a107 pa he nw diode lt 205 sharc 21xxx reference manual compiler book national semiconductor SBG LED MODUL
Contextual Info: ADSP-21160 SHARC DSP Hardware Reference Revision 3.0, November 2003 Part Number 82-001966-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2003 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent

SN8F27E64LJ

Abstract: SN8F27E65LJ SN8F27E65 SN8F27E60 SN8F27E65F DMx512 ic SN8F27E64L DMX512 RECEIVER IC 27e64 SN8F2
Contextual Info: SN8F27E60 Series 8-Bit Flash Micro-Controller with Embedded ICE and ISP SN8F27E60 Series USER’S MANUAL Version 1.0 SN8F27E65 SN8F27E64 SN8F27E62 SN8F27E65L SN8F27E64L SN8F27E62L SONiX 8-Bit Micro-Controller SONIX reserves the right to make change without further notice to any products herein to improve reliability, function or design. SONIX does not

HIQUAD64

Abstract: L9803 AM-113 410lsb HIQUAD64 ST st driver regulator automotive HiQUAD-64 HiQUAD-64 st TEC H bridge AD10 IS09141
Contextual Info: L9803 Super smart power motor driver with 8-Bit MCU, RAM, EEPROM, ADC, WDG, Timers, PWM and H-bridge driver Features • 6.4-18V Supply Operating Range ■ 16 MHz Maximum Oscillator Frequency ■ 8 MHz Maximum Internal Clock Frequency ■ Oscillator Supervisor

986 t04

Abstract: schottky k04 P714 diode DIODE C06 15 ADSP-2116x ADSP-21160 ADSP-21160M ADSP-21160N diode Sr 26
Contextual Info: S DSP Microcomputer ADSP-21160N a SUMMARY High Performance 32-Bit DSP—Applications in Audio, Medical, Military, Graphics, Imaging, and Communication Super Harvard Architecture—Four Independent Buses for Dual Data Fetch, Instruction Fetch, and Nonintrusive, Zero-Overhead I/O

986 t04

Abstract: ADSP-21060 reference manual ADSP-21160M
Contextual Info: a SHARC DSP Microcomputer ADSP-21160M SUMMARY High-Performance 32-Bit DSP—Applications in Audio, Medical, Military, Graphics, Imaging, and Communication Super Harvard Architecture—Four Independent Buses for Dual Data Fetch, Instruction Fetch, and Nonintrusive, Zero-Overhead I/O

IS09141

Abstract: d.331 transistor L9805 st driver regulator automotive HiQUAD-64 SPLIT MOTOR HiQuad SGFH LA AD10 PCB VK 557 diode 351
Contextual Info: L9805 Super Smart Power Motor Driver with 8-BIT MCU, CAN Interface, 16K EPROM, 256Bytes RAM, 128 Bytes EEPROM, 10 Bit ADC, WDG, 2 Timers, 2 PWM Modules, Full H-Bridge Driver PROUCT PREVIEW • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■

P5DF081

Abstract: MIFARE SAM AV2 mifare antenna SAMPLE CODE FOR MIFARE PLUS "Mifare ultralight C" DESFire Create File Command SAMPLE CODE FOR MIFARE clrc663 T1AR1070 MIFARE DESFire Functional Specification Mifare DESFire Functional Specification Rev 3.4
Contextual Info: MFRC630 Contactless reader IC Rev. 3.0 — 17 July 2012 227530 Product data sheet COMPANY PUBLIC 1. Introduction This document describes the functionality and electrical specifications of the contactless reader/writer IC MFRC630. 2. General description The MFRC630 is a highly integrated transceiver IC for contactless communication at

SAMPLE CODE FOR MIFARE clrc663

Abstract: nfc initiator MIFARE 14443A 13,56 MHz RFID Proximity Antennas Mifare 1k commands "SAM AV2" 15693 rfid Type B PICC BPSK SUBCARRIER LOAD MODULATION Mifare DESFire Functional Specification Rev 3.4 UART/SAMPLE CODE FOR MIFARE clrc663
Contextual Info: CLRC663 Contactless reader IC Rev. 3.3 — 3 April 2012 171133 Product data sheet COMPANY PUBLIC 1. Introduction This document describes the functionality and electrical specifications of the contactless reader/writer IC CLRC663. 2. General description The CLRC663 is a highly integrated transceiver IC for contactless communication at

TDSR 5130

Abstract: TDSR 5130 H TDSR 5130 g TDSR SQFP208 SAA6750H SAA7111 SAA7146 iso 13818-2 SAA711x
Contextual Info: INTEGRATED CIRCUITS DATA SHEET SAA6750H Encoder for MPEG2 image recording EMPIRE Preliminary specification File under Integrated Circuits, IC02 1998 Sep 07 Philips Semiconductors Preliminary specification Encoder for MPEG2 image recording (EMPIRE) SAA6750H

Contextual Info: MFRC630 High performance MIFARE reader solution Rev. 3.3 — 4 February 2014 227533 Product data sheet COMPANY PUBLIC 1. Introduction This document describes the functionality and electrical specifications of the contactless reader/writer IC MFRC630. 2. General description

clause 22 phy registers

Contextual Info: LatticeSC Family flexiPCS Data Sheet DS1005 Version 01.2, June 2006 LatticeSC flexiPCS Data Sheet Table of Contents June 2006 Introduction to flexiPCS .1-1