DATA50 Search Results

SuperSPARC

Abstract: Mbus master 250 slave circuit tmx390 STP1091-60
Contextual Info: S un M icroelectronics July 1997 Multi-Cache Controller DATA SHEET Integrated Cache Controller for SuperSPARC D e s c r ip t io n The STP1091 is a high-performance external cache controller for the STP1020 SuperSPARC and STP1021 (SuperSPARC-II) microprocessors. It is used when a large secondary cache or an interface to a non-MBus sys­

Contextual Info: Advance Data Sheet August 1998 LU5M31 Gigabit Ethernet Media Access Controller MAC Overview The LU5M31 is a single-port 1 Gbit/s MAC that incorporates physical coding sublayer (PCS) functionality. The LU5M31 is intended to enhance 10/ 100 Mbits/s Ethernet frame switching, multiple port

SMD45

Abstract: SMD34 224 d5 smd zd 15 p240f1 SMD52 SMD46 SMD-42 smd M16 SMD23
Contextual Info: お客様各位 カタログ等資料中の旧社名の扱いについて 2010 年 4 月 1 日を以って NEC エレクトロニクス株式会社及び株式会社ルネサステクノロジ が合併し両社の全ての事業が当社に承継されております。従いまして、本資料中には旧社

AT17256

Abstract: 7Pin din Connector AN076 qfp 32 k2511 phillips handbook XPLA1 UNSIGNED SERIAL DIVIDER using vhdl
Contextual Info: APPLICATION NOTE AN076 Using the Philips PZ3960 Evaluation Board 1998 Jul 21 Philips Semiconductors Application note Using the Philips PZ3960 Evaluation Board AN076 INTRODUCTION This note discusses the use of the Philips PZ3960 evaluation board. The main functions of the evauation board are the

Contextual Info: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid

SMD phase shifter 0201

Abstract: ts201S ADSP-TS201SABP-050 ADSP-TS201SABP-060 l3bc
Contextual Info: TigerSHARC Embedded Processor ADSP-TS201S • a KEY FEATURES KEY BENEFITS Up to 600 MHz, 1.67 ns instruction cycle rate 24M bits of internal—on-chip—DRAM memory 25 mm x 25 mm 576-ball thermally enhanced ball grid array package Dual-computation blocks—each containing an ALU, a

Supersparc

Abstract: IEEE754 STP1021A
Contextual Info: STP1021A July 1997 SuperSPARC -II DATA SHEET SPARC v8 32-Bit Superscalar Microprocessor DESCRIPTION The STP1021A is a new member of the SuperSPARC-II family of microprocessor products. Like its predecessors STP1020N, STP1020 and STP1021 this new part is fully SPARC Version 8 compliant and is completely upward compatible with the earlier SPARC Version 7 implementations running over 9,400 SPARC applications and development

mpc560xb bolero

Abstract: MPC5606B CHN 949 transistor BC 247 LINFlex PROTOCOL linflex MPC560xB "Base Station subsystem 30f131 pj 989
Contextual Info: Devices Supported: MPC5607B MPC5607BRM Rev. 5 31 Jan 2010 MPC5607B Microcontroller Reference Manual, Rev. 5 Freescale Semiconductor Preliminary—Subject to Change Without Notice 1 Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available

TDSR 5130

Abstract: TDSR 5130 H TDSR 5130 g TDSR SQFP208 SAA6750H SAA7111 SAA7146 iso 13818-2 SAA711x
Contextual Info: INTEGRATED CIRCUITS DATA SHEET SAA6750H Encoder for MPEG2 image recording EMPIRE Preliminary specification File under Integrated Circuits, IC02 1998 Sep 07 Philips Semiconductors Preliminary specification Encoder for MPEG2 image recording (EMPIRE) SAA6750H

EE-68

Abstract: ts201 Embedded Processor Preliminary Data Sheet link port ts201 32X32 ADSP-TS201S l3bc ADSP-TS201SABP-6X ADSP-TS201SABP-X
Contextual Info: TigerSHARC Embedded Processor ADSP-TS201S Preliminary Technical Data KEY FEATURES KEY BENEFITS Up to 600 MHz, 1.67 ns Instruction Cycle Rate 24M Bits of Internal—On-Chip—DRAM Memory 25x25 mm 576-Ball Thermally Enhanced Ball Grid Array Package Dual Computation Blocks—Each Containing an ALU, a Multiplier, a Shifter, a Register File, and a Communications Logic

PCR 406 J

Abstract: MPC5605 MPC5606B MPC5605B PCR 606 J MPC5607BRM transistor pcr 606 j MPC5607B APC UPS CIRCUIT DIAGRAM 7M 0880 IC pin ,j10
Contextual Info: MPC5607B Microcontroller Reference Manual Devices Supported: MPC5607B MPC5606B MPC5605B MPC5607BRM Rev. 6 30 Jun 2010 MPC5607B Microcontroller Reference Manual, Rev. 6 Freescale Semiconductor 1 Preliminary—Subject to Change Without Notice Chapter 1 Overview

Contextual Info: Numonyx Forté Serial Flash Memory M25P80 8 Mbit, low voltage, serial Flash memory with 75 MHz SPI bus interface Features • SPI bus compatible serial interface • 75 MHz Clock rate maximum • 2.7 V to 3.6 V single supply voltage • 8 Mbit of Flash memory

Contextual Info: SONY PRELIMINARY SCM603256A5 Cache Module for PowerPC 603e CPU PowerPC 603e 256KB Secondary Cache Description The SCM603256A5 module belongs to a set of sec­ ondary caches intended for use with PowerPC 603e based systems. The SCM603256A5 uses two of Sony’s 1M 32Kx32

supersparc

Abstract: HY 1021A Sun STP1021 3AR3 cap 220 htz ADA33
Contextual Info: [ f ^ T l r í A C K j S un M i c r o e l e c t r o n i c s July 1997 SuperSPARC“-ll DATA SHEET SPARC v8 32-Bit Superscalar Microprocessor D e s c r ip t io n The STP1021A is a new m em ber of the Su p erSPA R C T I fam ily o f m icroprocessor products. L ik e its predeces­

PB-MV40

Abstract: Photobit MV40 D100 D109 D110 D119 D120 D129 D130
Contextual Info: PB-MV40 4 Megapixel CMOS Active-Pixel Digital Image Sensor 2001 Photobit Technology Corporation. All rights reserved. Photobit Technology Corporation is a wholly owned subsidiary of Photobit Corporation. Photobit, the wave and binary symbol, Behind Every Great Digital Image, and TrueBit are registered trademarks-and TrueColor, TrueSNAP Shuttered-Node

GHW Connectors

Abstract: TDQ38 BTA60 bta61 bta80 bta11 BTA100 BTA32 bta50 bta81
Contextual Info: Version 1.2 December 1999 2975 Stender Way, Santa Clara, California 95054 Telephone: 800 345-7015 • TWX: 910-338-2070 • FAX: (408) 492-8674 Printed in U.S.A. 1999 Integrated Device Technology, Inc. Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance

bosch me 7.3.1 0 261 207 609 pinout

Abstract: mpc5604 bosch me 7.3.1 0 261 207 609 pinout diagram MPC560XPRM mlk 1899 mpc5604p MS146 manual temperature controller CHB 702 MPC560xP bosch ecu 0 261 200 218 connection diagram
Contextual Info: MPC5604P Microcontroller Reference Manual Devices Supported: MPC5602P MPC5603P MPC5604P MPC560XPRM Rev. 3 12 Feb 2010 MPC5604P Microcontroller Reference Manual, Rev. 3 Freescale Semiconductor 1 MPC5604P Microcontroller Reference Manual, Rev. 3 2 Freescale Semiconductor

MPC5604B

Abstract: PCR 406 J 10523 SDC 339 Bosch 30428 bosch me 7.3.1 0 261 207 609 pinout bosch edc 17 MPC5604BCRM 30541 bosch me 7.3.1 MPC5603
Contextual Info: MPC5604B/C Microcontroller Reference Manual Devices Supported: MPC5602B MPC5602C MPC5603B MPC5603C MPC5604B MPC5604C MPC5604BCRM Rev. 7 23 Jul 2010 MPC5604B/C Microcontroller Reference Manual, Rev. 7 Freescale Semiconductor 1 MPC5604B/C Microcontroller Reference Manual, Rev. 7

Contextual Info: STP1091 S un M ic r o e l e c t r o n ic s J u ly 1997 Multi-Cache Controller DATA SHEET Integrated Cache Controller for SuperSPARC D e s c r ip t io n The STP1091 is a high-perform ance external cache controller for the STP1020 SuperSPARC and STP1021

sot23-6 aa3

Abstract: l3bc ST-323-5 ADSP-TS201 SDRAM W17 sot23 micro usb 8pin schematic AE1233-ND p-channel mosfet m21 D44 SOT23-6 B20 SOT23-6
Contextual Info: ADSP-TS201S EZ-KIT Lite Evaluation System Manual Revision 1.0, March 2004 Part Number 82-000770-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2004 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written

SPC560P40

Abstract: TGS 813 RM0022 BOSCH 0 281 002 205 bosch me 7.3.1 SPC560P SPC560P50 501 CHB SPECIFICATIONS bosch me 7.3.1 0 261 206 707 pinout bosch 0 281 002 667
Contextual Info: RM0022 Reference manual 32-bit MCU family built on the Power Architecture embedded category for automotive chassis and safety electronics applications Introduction The SPC560Pxx is the first member of a family of microcontrollers based on the Power Architecture™ targeting chassis and safety market segment, specifically the Electrical

32x32 Multiplier

Abstract: EE-174 32X32 ADSP-TS201S processor cross reference avr ms1 diagram ADSP-TS201SABP-ENG
Contextual Info: PRELIMINARY TECHNICAL DATA TigerSHARC Embedded Processor ADSP-TS201S a Preliminary Technical Data KEY FEATURES 500 MHz, 2.0 ns Instruction Cycle Rate 24M Bits of Internal—On-Chip—DRAM Memory 25؋25 mm 576-Ball Thermally Enhanced Ball Grid Array Package

RFID tag

Abstract: ISO 14443-4 14443-4 command TAG 106 D A9211-B A9211B 14443-4 rfid circuit diagram rfid RFID protocol communication
Contextual Info: A9211B ISO/IEC 14443A RFID TAG IC FEATURE OTP Memory – – Compatible with ISO/IEC 14443A Standard 224 x 8 bits of data memory organized in 56 pages – No external power supply required – – 13.56MHz operating frequency – Total embedded 2048 bit OTP memory

ADSP-TS201 SDRAM

Abstract: TigerSHARC DSP Instruction set specification ADSP-TS201
Contextual Info: TigerSHARC Embedded Processor ADSP-TS202S a KEY FEATURES 1149.1 IEEE-compliant JTAG test access port for on-chip emulation On-chip arbitration for glueless multiprocessing 500 MHz, 2.0 ns instruction cycle rate 12M bits of internal—on-chip—DRAM memory