CD74HCT11 Search Results
CD74HCT11 Result Highlights (4)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
|---|---|---|---|---|---|
| CD74HCT112E | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 |
|
|
|
| CD74HCT11E | Texas Instruments | High Speed CMOS Logic Triple 3-Input AND Gates 14-PDIP -55 to 125 |
|
|
|
| CD74HCT11M96E4 | Texas Instruments | High Speed CMOS Logic Triple 3-Input AND Gates 14-SOIC -55 to 125 |
|
|
|
| CD74HCT11M96 | Texas Instruments | High Speed CMOS Logic Triple 3-Input AND Gates 14-SOIC -55 to 125 |
|
|
CD74HCT11 Datasheets (55)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CD74HCT11 | Texas Instruments | High Speed CMOS Logic Triple 3-Input AND Gates | Original | 32.35KB | 6 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT112 | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset | Original | 43.47KB | 8 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT112 | Texas Instruments | Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | Original | 54.05KB | 8 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT112E | Texas Instruments | CD74HCT112 - High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 | Original | 774.28KB | 20 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT112E | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 | Original | 650.43KB | 18 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT112E | Texas Instruments | HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | Original | 54.05KB | 8 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT112E | Texas Instruments | Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | Original | 234.56KB | 13 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT112E | Harris Semiconductor | Dual J-K Flip-Flop with Set and Reset | Scan | 432.86KB | 5 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT112E | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 33.05KB | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT112E96 | Texas Instruments | Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | Original | 41.05KB | 8 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT112EE4 | Texas Instruments | CD74HCT112 - High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 | Original | 774.28KB | 20 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT112EE4 | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset | Original | 373.18KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT112EE4 | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 | Original | 650.43KB | 18 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT112EG4 | Texas Instruments | Integrated Circuits (ICs) - Logic - Flip Flops - IC FF JK TYPE DUAL 1BIT 16DIP | Original | 769.42KB | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT112H | Harris Semiconductor | Dual J-K Flip-Flop with Set and Reset | Scan | 432.86KB | 5 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT112M | Harris Semiconductor | Dual J-K Flip-Flop with Set and Reset | Scan | 432.86KB | 5 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT112M | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 33.05KB | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT112M96 | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 33.05KB | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT11E | Texas Instruments | CD74HCT11 - High Speed CMOS Logic Triple 3-Input AND Gates 14-PDIP -55 to 125 | Original | 624.59KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HCT11E | Texas Instruments | High-Speed CMOS Logic Triple 3-Input AND Gate | Original | 136.29KB | 9 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
CD74HCT11 Price and Stock
Texas Instruments CD74HCT11MIC: digital; AND; Ch: 3; IN: 3; SMD; SO14; 4.5÷5.5VDC; HCT |
|||||||||||
| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
|
CD74HCT11M | 644 | 3 |
|
Buy Now | ||||||
|
CD74HCT11M | 3,954 | 442 |
|
Buy Now | ||||||
| CD74HCT11M | 3,500 | 442 |
|
Buy Now | |||||||
| CD74HCT11M | 3,150 | 442 |
|
Buy Now | |||||||
| CD74HCT11M | 2,050 | 442 |
|
Buy Now | |||||||
| CD74HCT11M | 2,000 | 442 |
|
Buy Now | |||||||
|
CD74HCT11M | 464 |
|
Buy Now | |||||||
|
CD74HCT11M | 14,654 | 1 |
|
Buy Now | ||||||
Texas Instruments CD74HCT11EIC: digital; AND; Ch: 3; IN: 3; CMOS; THT; DIP14; -55÷125°C; 2uA; 28ns |
|||||||||||
| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
|
CD74HCT11E | 1 |
|
Get Quote | |||||||
|
CD74HCT11E | 4,625 | 632 |
|
Buy Now | ||||||
| CD74HCT11E | 1,608 | 632 |
|
Buy Now | |||||||
| CD74HCT11E | 902 | 632 |
|
Buy Now | |||||||
|
CD74HCT11E | 1,000 | 26 Weeks | 1,000 |
|
Buy Now | |||||
|
CD74HCT11E | Bulk | 7 | 1 |
|
Buy Now | |||||
|
CD74HCT11E | 125 | 1 |
|
Buy Now | ||||||
|
CD74HCT11E | 100 |
|
Buy Now | |||||||
| CD74HCT11E | 100 |
|
Buy Now | ||||||||
|
CD74HCT11E | 7,634 | 1 |
|
Buy Now | ||||||
Texas Instruments CD74HCT112EIC: digital; non-inverting,inverting,JK flip-flop; Ch: 2; IN: 2 |
|||||||||||
| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
|
CD74HCT112E | 1 |
|
Get Quote | |||||||
|
CD74HCT112E | 3,925 | 636 |
|
Buy Now | ||||||
| CD74HCT112E | 3,675 | 636 |
|
Buy Now | |||||||
| CD74HCT112E | 1,625 | 636 |
|
Buy Now | |||||||
| CD74HCT112E | 1,000 | 636 |
|
Buy Now | |||||||
| CD74HCT112E | 898 | 636 |
|
Buy Now | |||||||
| CD74HCT112E | 729 | 636 |
|
Buy Now | |||||||
| CD74HCT112E | 113 | 8 |
|
Buy Now | |||||||
|
CD74HCT112E | 1,000 | 20 Weeks | 1,000 |
|
Buy Now | |||||
| CD74HCT112E | 113 | 1 |
|
Buy Now | |||||||
|
CD74HCT112E | 152 |
|
Buy Now | |||||||
|
CD74HCT112E | 12,422 | 1 |
|
Buy Now | ||||||
Harris Semiconductor CD74HCT11EAND Gate 3-Element 3-IN 14-Pin PDIP Tube |
|||||||||||
| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
|
CD74HCT11E | 10,055 |
|
Get Quote | |||||||
|
CD74HCT11E | 8,000 |
|
Buy Now | |||||||
| CD74HCT11E | 134 |
|
Buy Now | ||||||||
| CD74HCT11E | 4 |
|
Buy Now | ||||||||
|
CD74HCT11E | 590 | 1 |
|
Buy Now | ||||||
Texas Instruments CD74HCT11M96AND Gate 3-Element 3-IN 14-Pin SOIC T/R |
|||||||||||
| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
|
CD74HCT11M96 | 3,343 |
|
Get Quote | |||||||
|
CD74HCT11M96 | 4,940 | 1 |
|
Buy Now | ||||||
CD74HCT11 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
|
Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141F Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised May 2003 |
Original |
cd54hc112cd74hc112cd54hct112cd74hct112+3 | |
CD54
Abstract: CD54HC11 CD54HC11F3A CD54HCT11 CD54HCT11F3A CD74HC11 CD74HCT11 HC11
|
Original |
hct11cd54hc11cd74hc11cd54hct11+6 | |
|
Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
Original |
cd54hc112cd74hc112cd54hct112cd74hct112+4 | |
|
Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
Original |
hc112hct11cd54hc112cd74hc112+4 | |
CD54
Abstract: CD54HC11 CD54HC11F3A CD54HCT11 CD54HCT11F3A CD74HC11 CD74HCT11 HC11
|
Original |
hct11cd54hc11cd74hc11cd54hct11+6 | |
|
Contextual Info: [ /Title CD54 HCT11 , CD74 HC11, CD74 HCT11 /Subject (High CD54HC11, CD74HC11, CD54HCT11, CD74HCT11 Data sheet acquired from Harris Semiconductor SCHS273D High-Speed CMOS Logic Triple 3-Input AND Gate August 1997 - Revised July 2003 Features Description |
Original |
cd54hc11cd74hc11cd54hct11cd74hct11+2 | |
|
Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
Original |
hc112hct11cd54hc112cd74hc112+4 | |
CD74HC112
Abstract: 74HCT 74LS CD74HC112E CD74HCT112
|
Original |
hc112hct11cd74hc112cd74hct112+4 | |
|
Contextual Info: ASSESS? CD54HCT11, CD74HC11, CD74HCT11 High Speed CMOS Logic Triple 3-Input AND Gate August 1997 Features Description • Buffered Inputs The Harris C D54H CT11, CD74HC11, and C D74H CT11 logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power |
OCR Scan |
cd54hct11cd74hc11cd74hct1174hct | |
|
Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
Original |
cd54hc112cd74hc112cd54hct112cd74hct112+3 | |
|
Contextual Info: [ /Title CD54 HCT11 , CD74 HC11, CD74 HCT11 /Subject (High CD54HC11, CD74HC11, CD54HCT11, CD74HCT11 Data sheet acquired from Harris Semiconductor SCHS273E High-Speed CMOS Logic Triple 3-Input AND Gate August 1997 - Revised September 2003 Features Description |
Original |
hct11cd54hc11cd74hc11cd54hct11+2 | |
|
Contextual Info: Texas CD54HCT11, CD74HC11, CD74HCT11 In s t r u m e n t s Data sheet acquired from Harris Sem iconductor SCHS273 High Speed CMOS Logic Triple 3-Input AND Gate August 1997 Features Description • Buffered Inputs The Harris C D54H CT11, CD74HC11, and C D74H CT11 |
OCR Scan |
cd54hct11cd74hc11cd74hct1174hct | |
|
Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
Original |
cd54hc112cd74hc112cd54hct112cd74hct112+3 | |
|
Contextual Info: [ /Title CD54 HCT11 , CD74 HC11, CD74 HCT11 /Subject (High CD54HC11, CD74HC11, CD54HCT11, CD74HCT11 Data sheet acquired from Harris Semiconductor SCHS273E High-Speed CMOS Logic Triple 3-Input AND Gate August 1997 - Revised September 2003 Features Description |
Original |
cd54hc11cd74hc11cd54hct11cd74hct11+2 | |
|
|
|||
74ls gate symbols
Abstract: 74HCT 74LS CD54 CD54HCT11 CD74HC11 CD74HC11E CD74HCT11 HC11
|
Original |
hct11cd54hct11cd74hc11cd74hct11+7 | |
CD54HC112
Abstract: CD54HC112F3A CD54HCT112 CD54HCT112F3A CD74HC112 CD74HCT112
|
Original |
hc112hct11cd54hc112cd74hc112+6 | |
CD54
Abstract: CD54HC11 CD54HC11F3A CD54HCT11 CD54HCT11F3A CD74HC11 CD74HCT11 HC11
|
Original |
hct11cd54hc11cd74hc11cd54hct11+6 | |
CD54HC11
Abstract: CD54HC11F3A CD54HCT11 CD54HCT11F3A CD74HC11 CD74HCT11 HC11 CD54
|
Original |
hct11cd54hc11cd74hc11cd54hct11+6 | |
CD54
Abstract: CD54HC11 CD54HC11F3A CD54HCT11 CD54HCT11F3A CD74HC11 CD74HCT11 HC11
|
Original |
hct11cd54hc11cd74hc11cd54hct11+6 | |
CD54
Abstract: CD54HC11 CD54HC11F3A CD54HCT11 CD54HCT11F3A CD74HC11 CD74HCT11 HC11
|
Original |
hct11cd54hc11cd74hc11cd54hct11+6 | |
|
Contextual Info: [ /Title CD54 HCT11 , CD74 HC11, CD74 HCT11 /Subject (High CD54HC11, CD74HC11, CD54HCT11, CD74HCT11 Data sheet acquired from Harris Semiconductor SCHS273E High-Speed CMOS Logic Triple 3-Input AND Gate August 1997 - Revised September 2003 Features Description |
Original |
cd54hc11cd74hc11cd54hct11cd74hct11+2 | |
|
Contextual Info: CD74HC112, CD74HCT112 S E M I C O N D U C T O R Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 Features Description • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times The Harris CD74HC112 and CD74HCT112 utilize silicongate CMOS technology to achieve operating speeds |
Original |
cd74hc112cd74hct11274hct | |
|
Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
Original |
cd54hc112cd74hc112cd54hct112cd74hct112+3 | |
|
Contextual Info: [ /Title CD54 HCT11 , CD74 HC11, CD74 HCT11 /Subject (High CD54HC11, CD74HC11, CD54HCT11, CD74HCT11 Data sheet acquired from Harris Semiconductor SCHS273E High-Speed CMOS Logic Triple 3-Input AND Gate August 1997 - Revised September 2003 Features Description |
Original |
cd54hc11cd74hc11cd54hct11cd74hct11+2 | |