CD74HC112 Search Results
CD74HC112 Result Highlights (5)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
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| CD74HC112E | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 |
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| CD74HC112NSR | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SO -55 to 125 |
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| CD74HC112M96 | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
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| CD74HC112PWR | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-TSSOP -55 to 125 |
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| CD74HC112MT | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
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CD74HC112 Datasheets (66)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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| CD74HC112 | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset | Original | 43.47KB | 8 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112 | Texas Instruments | Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | Original | 54.05KB | 8 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112E | Texas Instruments | Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | Original | 54.05KB | 8 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112E | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 | Original | 650.43KB | 18 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112E | Texas Instruments | Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | Original | 234.56KB | 13 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112E | Texas Instruments | CD74HC112 - High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 | Original | 774.28KB | 20 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112E | Harris Semiconductor | Dual J-K Flip-Flop with Set and Reset | Scan | 432.86KB | 5 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112E | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 32.93KB | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112E96 | Texas Instruments | Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | Original | 41.05KB | 8 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112EE4 | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset | Original | 373.18KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112EE4 | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 | Original | 650.43KB | 18 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112EE4 | Texas Instruments | CD74HC112 - High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 | Original | 774.28KB | 20 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112H | Harris Semiconductor | Dual J-K Flip-Flop with Set and Reset | Scan | 432.86KB | 5 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112M | Harris Semiconductor | Dual J-K Flip-Flop with Set and Reset | Scan | 432.86KB | 5 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112M96 | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 | Original | 650.43KB | 18 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112M96 | Texas Instruments | HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET | Original | 54.05KB | 8 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112M96 | Texas Instruments | CD74HC112 - High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 | Original | 774.28KB | 20 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112M96 | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 32.93KB | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112M96E4 | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset | Original | 373.18KB | 15 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| CD74HC112M96E4 | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 | Original | 650.43KB | 18 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
CD74HC112 Price and Stock
Texas Instruments CD74HC112EFlip Flop JK-Type Neg-Edge 2-Element 16-Pin PDIP Tube |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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CD74HC112E | 24,775 | 675 |
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Buy Now | ||||||
| CD74HC112E | 16,975 | 675 |
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| CD74HC112E | 11,325 | 675 |
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| CD74HC112E | 7,798 | 675 |
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| CD74HC112E | 2,297 | 675 |
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CD74HC112E | 166 |
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CD74HC112E | 1,150 | 1 |
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CD74HC112E | 920 |
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Buy Now | |||||||
| CD74HC112E | 920 |
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CD74HC112E | 63,170 | 1 |
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CD74HC112E | 790 | 1 |
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Texas Instruments CD74HC112MTFlip Flop JK-Type Neg-Edge 2-Element 16-Pin SOIC T/R |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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CD74HC112MT | 5,250 | 298 |
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CD74HC112MT | 5,500 | 1 |
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Harris Semiconductor CD74HC112MCD74HC112M |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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CD74HC112M | 3,185 | 1,611 |
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CD74HC112M | 3,395 | 1 |
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Texas Instruments CD74HC112PWRFlip Flop JK-Type Neg-Edge 2-Element 16-Pin TSSOP T/R |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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CD74HC112PWR | 57 | 33 |
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CD74HC112PWR | 3,510 |
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CD74HC112PWR | Cut Strips | 57 | 12 Weeks | 1 |
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CD74HC112PWR | 274 | 1 |
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CD74HC112PWR | 219 |
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CD74HC112PWR | 2,000 |
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Get Quote | |||||||
Texas Instruments CD74HC112NSRFlip Flops Hi-Sp CMOS Dual Neg J-K-Type Flip-Flop |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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CD74HC112NSR | 2,403 |
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Buy Now | |||||||
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CD74HC112NSR | 2,000 |
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Get Quote | |||||||
CD74HC112 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141F Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised May 2003 |
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cd54hc112cd74hc112cd54hct112cd74hct112+3 | |
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Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
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cd54hc112cd74hc112cd54hct112cd74hct112+4 | |
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Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
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hc112hct11cd54hc112cd74hc112+4 | |
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Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
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cd54hc112cd74hc112cd54hct112cd74hct112+3 | |
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Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
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cd54hc112cd74hc112cd54hct112cd74hct112+3 | |
CD54HC112
Abstract: CD54HC112F3A CD54HCT112 CD54HCT112F3A CD74HC112 CD74HCT112
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hc112hct11cd54hc112cd74hc112+6 | |
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Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
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hc112hct11cd54hc112cd74hc112+4 | |
CD74HC112
Abstract: 74HCT 74LS CD74HC112E CD74HCT112
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hc112hct11cd74hc112cd74hct112+4 | |
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Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
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cd54hc112cd74hc112cd54hct112cd74hct112+3 | |
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Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
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cd54hc112cd74hc112cd54hct112cd74hct112+3 | |
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Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
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hc112hct11cd54hc112cd74hc112+4 | |
CD54HC112
Abstract: CD54HC112F3A CD54HCT112 CD54HCT112F3A CD74HC112 CD74HCT112
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hc112hct11cd54hc112cd74hc112+6 | |
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Contextual Info: CD74HC112, CD74HCT112 S E M I C O N D U C T O R Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 Features Description • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times The Harris CD74HC112 and CD74HCT112 utilize silicongate CMOS technology to achieve operating speeds |
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cd74hc112cd74hct11274hct | |
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Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
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cd54hc112cd74hc112cd54hct112cd74hct112+3 | |
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Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
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cd54hc112cd74hc112cd54hct112cd74hct112+3 | |
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Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
Original |
cd54hc112cd74hc112cd54hct112cd74hct112+3 | |
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Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
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cd54hc112cd74hc112cd54hct112cd74hct112+3 | |
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Contextual Info: CD74HC112, CD74HCT112 ^ Texas In s t r u m e n t s Data sheet acquired from Harris Sem iconductor _ schsi4i . , . . _ . . _ Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 Features at VCC = 5V • HCT Types - 4.5V to 5.5V Operation |
OCR Scan |
cd74hc112cd74hct11260mhz | |
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Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
Original |
cd54hc112cd74hc112cd54hct112cd74hct112+3 | |
CD54HC112
Abstract: CD54HC112F3A CD54HCT112 CD54HCT112F3A CD74HC112 CD74HCT112
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hc112hct11cd54hc112cd74hc112+6 | |
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Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003 |
Original |
cd54hc112cd74hc112cd54hct112cd74hct112+3 | |
CD54HC112
Abstract: CD54HC112F3A CD54HCT112 CD54HCT112F3A CD74HC112 CD74HCT112
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hc112hct11cd54hc112cd74hc112+6 | |
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Contextual Info: ASSESS? CD74HC112, CD74HCT112 Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 Features Description • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times The Harris CD74HC112 and CD74HCT112 utilize silicongate CMOS technology to achieve operating speeds |
OCR Scan |
cd74hc112cd74hct11274hct | |
CD54HC112
Abstract: CD54HC112F3A CD54HCT112 CD54HCT112F3A CD74HC112 CD74HCT112
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Original |
hc112hct11cd54hc112cd74hc112+6 | |