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    CD74HC112 Search Results

    CD74HC112 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    CD74HC112E
    Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 Visit Texas Instruments Buy
    CD74HC112NSR
    Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SO -55 to 125 Visit Texas Instruments Buy
    CD74HC112M96
    Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 Visit Texas Instruments Buy
    CD74HC112PWR
    Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-TSSOP -55 to 125 Visit Texas Instruments Buy
    CD74HC112MT
    Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 Visit Texas Instruments

    CD74HC112 Datasheets (66)

    Select Manufacturer
    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    CD74HC112
    Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset Original PDF 43.47KB 8
    CD74HC112
    Texas Instruments Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger Original PDF 54.05KB 8
    CD74HC112E
    Texas Instruments Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger Original PDF 54.05KB 8
    CD74HC112E
    Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 Original PDF 650.43KB 18
    CD74HC112E
    Texas Instruments Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger Original PDF 234.56KB 13
    CD74HC112E
    Texas Instruments CD74HC112 - High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 Original PDF 774.28KB 20
    CD74HC112E
    Harris Semiconductor Dual J-K Flip-Flop with Set and Reset Scan PDF 432.86KB 5
    CD74HC112E
    Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF 32.93KB 1
    CD74HC112E96
    Texas Instruments Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger Original PDF 41.05KB 8
    CD74HC112EE4
    Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset Original PDF 373.18KB 15
    CD74HC112EE4
    Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 Original PDF 650.43KB 18
    CD74HC112EE4
    Texas Instruments CD74HC112 - High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 Original PDF 774.28KB 20
    CD74HC112H
    Harris Semiconductor Dual J-K Flip-Flop with Set and Reset Scan PDF 432.86KB 5
    CD74HC112M
    Harris Semiconductor Dual J-K Flip-Flop with Set and Reset Scan PDF 432.86KB 5
    CD74HC112M96
    Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 Original PDF 650.43KB 18
    CD74HC112M96
    Texas Instruments HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET Original PDF 54.05KB 8
    CD74HC112M96
    Texas Instruments CD74HC112 - High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 Original PDF 774.28KB 20
    CD74HC112M96
    Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF 32.93KB 1
    CD74HC112M96E4
    Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset Original PDF 373.18KB 15
    CD74HC112M96E4
    Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 Original PDF 650.43KB 18
    SF Impression Pixel

    CD74HC112 Price and Stock

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    Texas Instruments CD74HC112E

    Flip Flop JK-Type Neg-Edge 2-Element 16-Pin PDIP Tube
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Verical () CD74HC112E 24,775 675
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    • 1000 $0.51
    • 10000 $0.46
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    CD74HC112E 16,975 675
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    • 10000 $0.46
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    CD74HC112E 11,325 675
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    • 1000 $0.51
    • 10000 $0.46
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    CD74HC112E 7,798 675
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    CD74HC112E 2,297 675
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    • 10000 $0.51
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    Bristol Electronics CD74HC112E 1,150 1
    • 1 $1.00
    • 10 $1.00
    • 100 $0.37
    • 1000 $0.26
    • 10000 $0.26
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    Quest Components () CD74HC112E 920
    • 1 $0.69
    • 10 $0.69
    • 100 $0.69
    • 1000 $0.28
    • 10000 $0.28
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    CD74HC112E 920
    • 1 $1.33
    • 10 $1.33
    • 100 $0.40
    • 1000 $0.35
    • 10000 $0.35
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    Rochester Electronics CD74HC112E 63,170 1
    • 1 -
    • 10 -
    • 100 $0.49
    • 1000 $0.41
    • 10000 $0.37
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    TME CD74HC112E 790 1
    • 1 $0.60
    • 10 $0.60
    • 100 $0.48
    • 1000 $0.42
    • 10000 $0.39
    Buy Now

    Texas Instruments CD74HC112MT

    Flip Flop JK-Type Neg-Edge 2-Element 16-Pin SOIC T/R
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Verical CD74HC112MT 5,250 298
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    • 1000 $1.05
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    Rochester Electronics CD74HC112MT 5,500 1
    • 1 -
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    • 100 $1.01
    • 1000 $0.84
    • 10000 $0.75
    Buy Now

    Harris Semiconductor CD74HC112M

    CD74HC112M
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Verical CD74HC112M 3,185 1,611
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    Rochester Electronics CD74HC112M 3,395 1
    • 1 -
    • 10 -
    • 100 $0.22
    • 1000 $0.19
    • 10000 $0.17
    Buy Now

    Texas Instruments CD74HC112PWR

    Flip Flop JK-Type Neg-Edge 2-Element 16-Pin TSSOP T/R
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Verical CD74HC112PWR 57 33
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    • 100 $0.29
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    Arrow Electronics CD74HC112PWR Cut Strips 57 12 Weeks 1
    • 1 $0.33
    • 10 $0.31
    • 100 $0.29
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    Bristol Electronics CD74HC112PWR 274 1
    • 1 $0.75
    • 10 $0.75
    • 100 $0.28
    • 1000 $0.24
    • 10000 $0.24
    Buy Now
    Quest Components CD74HC112PWR 219
    • 1 $1.00
    • 10 $1.00
    • 100 $0.50
    • 1000 $0.30
    • 10000 $0.30
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    TME CD74HC112PWR 2,000
    • 1 -
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    • 10000 $0.27
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    Texas Instruments CD74HC112M96

    J-K FLIP-FLOP, HC/UH SERIES, 2-FUNC, NEGATIVE EDGE TRIGGERED, 2-BIT, COMPLEMENTARY OUTPUT, CMOS, PDSO16
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Quest Components CD74HC112M96 71
    • 1 $0.43
    • 10 $0.43
    • 100 $0.28
    • 1000 $0.28
    • 10000 $0.28
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    TME CD74HC112M96 2,500
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    • 10000 $0.27
    Get Quote

    CD74HC112 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141F Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised May 2003


    Original
    cd54hc112cd74hc112cd54hct112cd74hct112+3schs141fhc112hct112 PDF

    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original
    cd54hc112cd74hc112cd54hct112cd74hct112+4schs141hhc112hct112wid54hc112 PDF

    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original
    hc112hct11cd54hc112cd74hc112+4cd54hct112cd74hct112schs141hhct112 PDF

    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original
    cd54hc112cd74hc112cd54hct112cd74hct112+3schs141hhc112hct112 PDF

    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original
    cd54hc112cd74hc112cd54hct112cd74hct112+3schs141hhc112hct112 PDF

    CD54HC112

    Abstract: CD54HC112F3A CD54HCT112 CD54HCT112F3A CD74HC112 CD74HCT112
    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original
    hc112hct11cd54hc112cd74hc112+6cd54hct112cd74hct112schs141hhct112cd54hc112f3acd54hct112f3a PDF

    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original
    hc112hct11cd54hc112cd74hc112+4cd54hct112cd74hct112schs141hhct112 PDF

    CD74HC112

    Abstract: 74HCT 74LS CD74HC112E CD74HCT112
    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD74HC112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141 Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 Features at VCC = 5V


    Original
    hc112hct11cd74hc112cd74hct112+4schs14174hct74lscd74hc112e PDF

    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original
    cd54hc112cd74hc112cd54hct112cd74hct112+3schs141hhc112hct112 PDF

    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original
    cd54hc112cd74hc112cd54hct112cd74hct112+3schs141hhc112hct112 PDF

    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original
    hc112hct11cd54hc112cd74hc112+4cd54hct112cd74hct112schs141hhct112 PDF

    CD54HC112

    Abstract: CD54HC112F3A CD54HCT112 CD54HCT112F3A CD74HC112 CD74HCT112
    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original
    hc112hct11cd54hc112cd74hc112+6cd54hct112cd74hct112schs141hhct112cd54hc112f3acd54hct112f3a PDF

    Contextual Info: CD74HC112, CD74HCT112 S E M I C O N D U C T O R Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 Features Description • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times The Harris CD74HC112 and CD74HCT112 utilize silicongate CMOS technology to achieve operating speeds


    Original
    cd74hc112cd74hct11274hct PDF

    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original
    cd54hc112cd74hc112cd54hct112cd74hct112+3schs141hhc112hct112 PDF

    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original
    cd54hc112cd74hc112cd54hct112cd74hct112+3schs141hhc112hct112 PDF

    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original
    cd54hc112cd74hc112cd54hct112cd74hct112+3schs141hhc112hct112 PDF

    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original
    cd54hc112cd74hc112cd54hct112cd74hct112+3schs141hhc112hct112 PDF

    Contextual Info: CD74HC112, CD74HCT112 ^ Texas In s t r u m e n t s Data sheet acquired from Harris Sem iconductor _ schsi4i . , . . _ . . _ Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 Features at VCC = 5V • HCT Types - 4.5V to 5.5V Operation


    OCR Scan
    cd74hc112cd74hct11260mhz PDF

    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original
    cd54hc112cd74hc112cd54hct112cd74hct112+3schs141hhc112hct112 PDF

    CD54HC112

    Abstract: CD54HC112F3A CD54HCT112 CD54HCT112F3A CD74HC112 CD74HCT112
    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141G Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised July 2003


    Original
    hc112hct11cd54hc112cd74hc112+6cd54hct112cd74hct112schs141ghct112cd54hc112f3acd54hct112f3a PDF

    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original
    cd54hc112cd74hc112cd54hct112cd74hct112+3schs141hhc112hct112 PDF

    CD54HC112

    Abstract: CD54HC112F3A CD54HCT112 CD54HCT112F3A CD74HC112 CD74HCT112
    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original
    hc112hct11cd54hc112cd74hc112+6cd54hct112cd74hct112schs141hhct112cd54hc112f3acd54hct112f3a PDF

    Contextual Info: ASSESS? CD74HC112, CD74HCT112 Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 Features Description • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times The Harris CD74HC112 and CD74HCT112 utilize silicongate CMOS technology to achieve operating speeds


    OCR Scan
    cd74hc112cd74hct11274hct PDF

    CD54HC112

    Abstract: CD54HC112F3A CD54HCT112 CD54HCT112F3A CD74HC112 CD74HCT112
    Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original
    hc112hct11cd54hc112cd74hc112+6cd54hct112cd74hct112schs141hhct112cd54hc112f3acd54hct112f3a PDF