| 
CD54HCT112
 | 
 | 
Texas Instruments
 | 
High Speed CMOS Logic Dual J-K Flip-Flops with Set and Reset, Negative-Edge Trigger | 
Original | 
PDF
 | 
43.47KB | 
8 | 
| 
CD54HCT112/3A
 | 
 | 
Harris Semiconductor
 | 
Dual J-K Flip-Flop with Set and Reset | 
Original | 
PDF
 | 
39.97KB | 
5 | 
| 
CD54HCT112/3A
 | 
 | 
RCA Solid State
 | 
High-Reliability High-Speed CMOS Logic ICs | 
Scan | 
PDF
 | 
68.48KB | 
2 | 
| 
CD54HCT112/3A
 | 
 | 
RCA Solid State
 | 
High-Reliability High-Speed CMOS Logic ICs | 
Scan | 
PDF
 | 
66.9KB | 
2 | 
| 
CD54HCT112F
 | 
 | 
Harris Semiconductor
 | 
Dual J-K Flip-Flop with Set and Reset | 
Scan | 
PDF
 | 
432.86KB | 
5 | 
| 
CD54HCT112F3A
 | 
 | 
Texas Instruments
 | 
HIGH SPEED CMOS LOGIC DUAL J-K FLIP-FLOPS WITH SET AND RESET, NEGATIVE-EDGE TRIGGER | 
Original | 
PDF
 | 
54.05KB | 
8 | 
| 
CD54HCT112F3A
 | 
 | 
Texas Instruments
 | 
High Speed CMOS Logic Dual J-K Flip-Flops with Set and Reset, Negative-Edge Trigger 16-CDIP -55 to 125 | 
Original | 
PDF
 | 
650.43KB | 
18 | 
| 
CD54HCT112F3A
 | 
 | 
Texas Instruments
 | 
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | 
Original | 
PDF
 | 
234.56KB | 
13 | 
| 
CD54HCT112F3A
 | 
 | 
Texas Instruments
 | 
CD54HCT112 - High Speed CMOS Logic Dual J-K Flip-Flops with Set and Reset, Negative-Edge Trigger 16-CDIP -55 to 125 | 
Original | 
PDF
 | 
774.28KB | 
20 | 
| 
CD54HCT112F3A
 | 
 | 
Unknown
 | 
Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | 
Historical | 
PDF
 | 
45.34KB | 
1 | 
| 
CD54HCT112F3A96
 | 
 | 
Texas Instruments
 | 
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger | 
Original | 
PDF
 | 
41.05KB | 
8 | 
| 
CD54HCT112H
 | 
 | 
Harris Semiconductor
 | 
Dual J-K Flip-Flop with Set and Reset | 
Scan | 
PDF
 | 
432.86KB | 
5 |