Part Number
    Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    B3S33TL Search Results

    B3S33TL Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Contextual Info: nOSEL-VITELIC bSE ]> • b3S33Tl G0 Dlfl2ö b?b M M O V I V53C256A FAMILY HIGH PERFORMANCE, LOW POWER 2 5 6 K X 1 BIT FAST PAGE MODE CMOS DYNAMIC RAM MOSEL- VITELIC H IG H P E R F O R M A N C E V 5 3 C 2 5 6 A 6 0 /6 0 L 7Q /70L 8 0 /8 0 L 1 0 /1 0 L 60 ns


    OCR Scan
    b3s33tlv53c256a PDF

    Contextual Info: MOSEL — VITELIC 4flE D MOSEL b3S33Tl Q O Q O i m MOVI 5 MS72215/16 & MS72225/26 ADVANCE INFORMATION 512 x 18 & 1024 x 18 Parallel Synchronous FIFOs FEATURES DESCRIPTION • Full C M O S clocked synchronous FIFO s The MS72215/16 and MS72225/26 are clocked registered FIFOs


    OCR Scan
    b3s33tlms72215/16ms72225/2618-bit PDF

    Contextual Info: S4E D b3S33Tl DGQlbMB 1Ö4 MOSEL MS318000 ADVANCE INFORMATION 512K x 16,1 MEG x 8 CMOS Mask Mask Programmable ROM f! OSEL - VI T EL IC FEATURES The MS318000 is an 8 Mb CMOS Slgate maskprogrammable static read only memory organized as 524,288 words by 16 bits or 1,048,576 words by 8


    OCR Scan
    b3s33tlms318000200ns PDF

    386dx bios

    Abstract: Non VGA Video Controller IC 486DX 486SX
    Contextual Info: SME D MOSEL • b3S33Tl DDD171D S55 « M O V I MS400 Ì10SEL-VITELIC p r e lim in a r y 486SX / 486DX Single Chip AT "O S FEATURES DESCRIPTION • Direct Interface to 486SX/487SX or 486DX at speeds from 20-33MHz The MS400 is a highly integrated single chip AT opti­


    OCR Scan
    b3s33tlddd171d10sel-vitelicms400+5486sx486dxms441/3386dx biosnon vga video controller ic PDF

    MS628128

    Contextual Info: MOSEL-VITELIC fc,2E ]> MOSEL-VITELIC • b3S33Tl QQQ25Q7 OTh ■ UOVI MS628128 1048576 131,072 x 8 CMOS STATIC RAM WITH DATA RETENTION AND LOW POWER ADVANCED INFORMA TION Features Description ■ Available in 8 0 /100/120 ns (Max.) ■ Automatic power-down when chip disabled


    OCR Scan
    b3s33tlqqq25q7ms628128s628128+6s628128lms628128-80fcms628128l-80pcms628128l-80fcms628128-1opcms628128-1ofc PDF

    Contextual Info: MOSEL-VITELIC bSE J> m M O S E L -V IT E L IC bBSBBTl ÜDD24Db 27e! « M O V I V404J232and V404J236 2M x 32 and 2M x 36 CMOS MEMORY MODULES PRELIMINARY Features Description • ■ ■ ■ ■ ■ The V404J232 memory Module is organized as 2,097,152 x 32 bits in a 72-lead single-in-line mod­


    OCR Scan
    v404j232andv404j236dd24db72-lead+3v404j23272leadv404j232/236 PDF

    7202A

    Contextual Info: M OSEL V ITEU C MS7200U7201AL/7202AL 256x9,512x9, 1Kx9 CMOS FIFO Features Descriptions • First-In/First-Out static RAM based dual port memory ■ Three densities in a x9 configuration ■ Low power versions ■ Includes empty, full, and half full status flags


    OCR Scan
    ms7200u7201al/7202al256x9512x9ms7200l/7201al/7202al+7ms7200-25ncms7200-25jcms7200-25fcms7200-35nqms7200-35jcms7200-35fc7202a PDF

    led flasher

    Abstract: T-77-13
    Contextual Info: 5 4E ]> • =,3533^1 00D1L.72 ' i l l ■ MOVI MOSEL NOSEL-VITELIC MSS0581 Speech Synthesizer (Voice ROM FEATURES • Single power can operate at 2.4V through 5V. • Direct drive buzzer and output could drive speaker. • Cascade function that can extend the speech


    OCR Scan
    00d1lmss0581pid201b3s33+50ddlb77510sel-vitelicb3s33tlled flashert-77-13 PDF

    Contextual Info: M O SEL VITELIC V53C311616500 3.3 VOLT 1 M X 16 EDO PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE 50 60 70 Max. RAS Access Time, Irac 50 ns 60 ns 70 ns Max. Column Address Access Time, (^ aa) 25 ns 30 ns 35 ns Min. Extended Data Out Page Mode Cycle Time, fcc)


    OCR Scan
    v53c31161650016-bitcycles/6442-pin+350/44-ping0g415100qm1s2 PDF

    45l50

    Abstract: V53C104H
    Contextual Info: M O S E L V I T E L IC V53C104H U LTR A -H IG H PERFO RM ANCE, L O W P O W ER 2 5 6 K X 4 B IT F A S T P A G E M O D E CM O S D YN A M IC R A M HIGH PERFORMANCE 45/45L 50/50L 55/55L 60/60L Max. RAS Access Time, 1RAC 45 ns 50 ns 55 ns 60 ns Max. Column Address Access Time, (tCAA)


    OCR Scan
    v53c104h45/45l50/50l55/55l+660/60l110nsv53c104hlv53c104h-60v53c104h-145l50 PDF

    Contextual Info: M O S E L VÊTEL IC V53C8256H U LTR A -H IG H PERFO RM ANCE, L O W PO W ER 2 5 6 K X 8 B IT F A S T P A G E M O D E CM O S D YN A M IC R A M H IG H P E R F O R M A N C E Max. RAS Access Time, tRAC 4 5 /4 5 L 5 0 /5 0 L 5 5 /5 5 L 6 0 /6 0 L 45 ns 50 ns 55 ns


    OCR Scan
    v53c8256h115ns8256h PDF

    Contextual Info: M O SE L VÊTELIC V53C404B HIGH PERFORMANCE, LOW POWER 1 M X 4 BIT FAST PAGE MODE CMOS DYNAMIC RAM 60 70 80 10 M ax. RAS Access Time, 1RAC 60 ns 70 ns 80 ns 100 ns M ax. Column Address Access Tim e, (tCAA) 30 ns 35 ns 40 ns 50 ns HIGH PERFORMANCE V53C404B


    OCR Scan
    v53c404b404b-10 PDF

    Contextual Info: M OSEL VITELIC V53C8125H ULTR A -H IG H PERFORM ANCE, 128K X 8 B IT F A S T P A G E M O D E CM OS D Y N A M IC R A M HIGH PERFORMANCE P R E LIM IN A R Y 35 40 45 50 Max. RAS Access Time, tRAC 35 ns 40 ns 45 ns 50 ns Max. Column Address Access Time, (tç^A)


    OCR Scan
    v53c8125h24-pin26/24-pin000355b PDF

    Contextual Info: M O S E L V IT E L IC V53C8257H U LTR A -HIG H SPEED, 256KX 8B IT P A G E M O D E WITH E X TE N D E D DATA O U T P U T ED O A N D C A S B U R S T M O D E CM O S D YN A M IC R A M PR E LIM IN A R Y 45/45L 50/50L 55/55L 60/60L Max. RAS Access Time, Orac)


    OCR Scan
    v53c8257h256kx45/45l50/50l+355/55l60/60lvs3c8257h PDF

    Contextual Info: M O SE L VITELIC PRELIMINARY V62C518256 32Kx8 BIT STATIC RAM Features Description • High-speed: 35,45, 55, 70 ns ■ Ultra low DC operating current of 5mA Max. ■ Low Power dissipation: TTL Standby: 3mA (Max.) CMOS Standby: 20n.A (Max.) ■ Fully static operation


    OCR Scan
    v62c51825632kx828-pin144-bit+1b3533tl PDF

    Contextual Info: M O S E L V IT E L IC V53C16256L 3.3 VOLT 2 5 6 K X 16 FAST PAGE MODE CMOS DYNAMIC RAM PRELIMINARY 40 45 50 60 Max. RAS Access Time, tpAo 40 ns 45 ns 50 ns 60 ns Max. Column Address Access Time, (fc/vO 20 ns 22 ns 24 ns 30 ns Min. Fast Page Mode Cycle Time, (tpC)


    OCR Scan
    v53c16256l16-bitb3s33tl PDF

    Contextual Info: M O SEL VTTEUC PRELIMINARY V104J232 512K x 32 SIMM Features Description 524,288 x 32 bit organizations Utilizes 256K x 4 CMOS DRAMs Fast access times 70 ns, 80 ns, 100 ns Fast Page mode operation Low power dissipation _ CAS before RAS refresh, RAS only refresh, and


    OCR Scan
    v104j23272-leaddd03350 PDF

    Contextual Info: M O S EL V IT E L IC V53C8129H ULTRA-HIGH PERFORMANCE, 128K X 8 BIT EDO PAGE MODE CMOS DYNAMIC RAM PRELIMINARY 35 40 45 50 Max. RAS Access Time, tRAC 35 ns 40 ns 45 ns 50 ns Max. Column Address Access Time, (Icu ò 18 ns 20 ns 22 ns 24 ns Min. Fast Page Mode With EDO Cycle Time, (tpC)


    OCR Scan
    v53c8129hv53c8129h-5024-pin26/24-pin+1qd03fl3b PDF

    Contextual Info: M O S EL V IT E L IC V53C511816502 1M x 16 EDO PA G E M ODE CMOS DYNAM IC RAM OPTIONAL SE LF REFRESH HIGH PERFORMANCE 50 60 Max. RAS Access Time, Jrac 50 ns 60 ns Max. Column Address Access Time, (^;aa ) 25 ns 30 ns Min. Extended Data Out Page Mode Cycle Time, (1pC)


    OCR Scan
    v53c51181650216-bitcycles/1642-pin+244/50-pinb3s33tl PDF

    Contextual Info: M O SEL VITELIC PREW BBtO M V62C51864 8Kx8 B IT STA TIC RAM Features Description • ■ ■ The V 62C 51864 is a 65,536-bit static random access memory organized as 8,192 words by 8 bits. It is built with M O SE L VITE LIC ’s high performance C M O S process. Inputs and three state outputs are


    OCR Scan
    v62c51864536-bitb353328-pin PDF

    Contextual Info: MOSEL VITELIC P R E LIM IN A R Y V53C16256H 2 5 6 K X 16 F A S T P A G E M O D E CM O S D YN A M IC R A M HIGH PERFORMANCE 40 45 50 60 40 ns 45 ns 50 ns 60 ns 20 ns 22 ns 24 ns 30 ns Min. Fast Page Mode Cycle Time, tPC 23 ns 25 ns 28 ns 35 ns Min. Read/Write Cycle Time, (tRC)


    OCR Scan
    v53c16256h110nsl3s331140-pin+2b3533110003b0fl PDF

    ULTRA HQX

    Abstract: MS62256L-10 MS62256 MS62256L-12 MS62256L-70 MS62256L-70FC MS62256L-85 T-46 ms62256l-70pc MS62256L10PC
    Contextual Info: S4E » b3533Tl 00D13TÏ 311 MOSEL IMOVI MS62256 32K x 8 CMOS Static RAM MOSEL-VITELIC r r -4 1 0 -2 3 -1 3 » FEATURES DESCRIPTION • High-speed - 70/85/100/120 ns The MOSEL M S62256 is a 262,144-bit static random access memory organized as 32,768 words by 8 bits and


    OCR Scan
    b3533tlddd13tms62256ms62256l+13385mw144-bitms622iod500mvms62256l-70fcultra hqxms62256l-10ms62256l-12ms62256l-70ms62256l-85t-46ms62256l-70pcms62256l10pc PDF

    v110h

    Abstract: V53C104F
    Contextual Info: M O S E L VTTELÊ C V53C 104F H IG H PE R FO RM A N CE, L O W P O W E R 2 5 6 K X 4 B IT F A S T P A G E M O D E CM O S D Y N A M IC R A M 60/60L 70/70L 80/80L Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns Max. Column Address Access Time, (tCAA) 30 ns 35 ns


    OCR Scan
    v53c104f60/60l70/70l80/80l+6v53c104fl200ma200nav53c104f-80v53c104f-1v110h PDF

    kexz

    Contextual Info: MOSEL-VITELIC b2E » MOSEL-VITELIC • b3533Tl GGGS33L. GES ■ M O V I V104J232, V104J236 512K X 32, 512K x 36 SIMM PRELIMINARY Features Description a 524,288 x 32 bit or 524,288 x 36 bit The V104J232 Memory Module is organized as 524,288 x 32 bits in a 72-lead single-in-line module.


    OCR Scan
    b3533tlgggs33lv104j232v104j236+472-leadqdqe34a104j232/236kexz PDF