A00RESS Search Results

Contextual Info: ID M 29803 National Semiconductor ID M 2 9 8 0 3 1 6 -W a y Branch Controller G eneral Description Featu res and Benefits When used in conjunction w ith the IDM2909A address controller, the IDM29803 provides 16-way branch control. Four different inputs can be tested simul­

CL 2181 ic

Abstract: AT/CL 2181 ic CL 2181
Contextual Info: ANALOG DEVICES DSP Microcomputers ADSP-2181 /ADSP-2183 FEATURES PERFORMANCE 30 ns Instruction Cycle Time @ 5.0 Volts 33 MIPS Sustained Performance 34.7 ns Instruction Cycle Time @ 3.3 Volts Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in

mc2764

Abstract: MC2164 MC2764-2 D80D0 EPROM 27126 eprom 27C16 ic eprom 27c16 NMC2764-2 NMC2764-25 NMC2764-30
Contextual Info: o x j / kjt' 5 003588 National Semiconductor PRELIMINARY July 1983 NMC2764 65,536-Bit 8192 x 8 UV Erasable PROM • NMC27B4 •/ NMC2764H NMC2764-3 ' NMC2764H-3 NMC2764-4 </NMC2764H-4 * NMC2764-2S y NMC2764H*25 i .NMC2764*30 NMC2764H-30 /N M C 2764-45 'NM C 2764H-45

MAX7218

Abstract: pin configuration for common cathode 7 segment di ICM7218AIPI ICM7218BIPI 3-DIGIT 7-SEGMENT LED DISPLAY ICM7218 ICM7218A ICM7218AIJI ICM7218B ICM7218BIJI
Contextual Info: y k iy jx iy k i 8 D ig it LED D isplay D river _ Features The Maxim ICM7218 display driver interfaces m icro­ processors to an 8 digit, 7 segment, numeric LED display. Included on chip are two types of 7 segment decoders, multiplex scan circuitry, segment and digit

block diagram of 80386 microprocessor

Abstract: 80386 microprocessor pin out diagram microprocessor 80386 pin out diagram pvga1 80387 80386 microprocessor functional block diagram 80387sx pvga1a T26d faraday fe6500
Contextual Info: Advance Information FE6010 DMA and Channel Control Logic □ Completely compatible with the IBM Personal □ Micro Channel* Arbitration Control Logic System/2* Models 70 and 80 □ Functionality equivalent to two 8237 DMA con­ a Configurable for systems based on the 80386

Contextual Info: MOTOROLA SEM ICO N D U CTO R TECHNICAL DATA MCM62973A Product Preview 4 K x 12 Bit Syn ch ro n o u s S ta tic RAM w ith O utput Registers Th e M CM 62973A is a 49,152 bit synchronous static random a cce ss memory organized as 4096 w ords of 12 bits, fabricated using M otorola's second-generation high-perform ance

DM85

Abstract: DM85S68
Contextual Info: DM75S68/DM85S68/DM75S68A/DM85S68A 16x4 Edge Triggered Registers G eneral Description Features These Schottky memories are addressable “ D” register files. Any of its 16 four-bit words may be asynchronously read or may be written into on the next clock transition. An

MM4220DF/MM5220DF

Abstract: mm5221 MM4240 DS8807 MM5017 54S287 MM1402a equivalent transistor bf 175 MM74C920 MM5061
Contextual Info: Edge Index by Product Family NATIONAL This is National's first Memory handbook containing information on MOS and Bipolar Memory Components, Systems, Application Notes and Support Circuits. For detailed information on Interface Circuits and other major product lines, contact a National sales office, representative, or distributor.

dm8130

Abstract: 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76
Contextual Info: 19 7 6 N atio n al S e m ico n d u cto r C o rp . p 1 ? I m • ' % TTL Data Book D EV IC E MIL i 2502 2503 2504 5400 54H00 54L00 54LS00 5401 54H01 54L01 54LS01 5402 54L02 54LS02 5403 54L03 54LS03 5404 54H04 54L04 54LS04 5405 54H05 54L05 54LS05 5406 5407 5408

la 76805 volt on pin

Abstract: intel 8708 eprom M3002 Pulse M3001 eprom 8708 2316a rom UPP-103 interfacing 8275 crt controller with 8086 intel 1402a Pascall
Contextual Info: Intel Corporation 3065 Bowers Avenue • Santa Clara, CA 95051 Telephone: 408 987-8080 TWX: 910-338-0026- Telex: 34-6372 inter Component Data Catalog 1978 Numerical and Functional Indexes 1 General Information 2 Random Access Memory 3 Read Only Memory 4

cen 30

Abstract: I82C288 231369
Contextual Info: in te i 82C288 BUS CONTROLLER FOR 80286 PROCESSORS 82C288-12, 82C288-10, 82C288-8 Provides Commands and Controls for Local and System Bus Wide Flexibility in System Configurations High Speed CHMOS III Technology Fully Compatible with the HMOS 82288 Fully Static Device

IDM2901A

Abstract: idm2901 IDM2901A-2JC 2901a DM2901 DM2901A-2JM IDM2901AJM/IDM2901A-1JM/IDM2901A-2JM
Contextual Info: IDM2901A, IDM2901A-1,1DM2901A-2 m National 2900 Family/ Bipolar Microprocessor m S t S e m ic o n d u c to r IDM2901A, IDM2901A-1/IDM2901A-2 4-Bit Bipolar Microprocessor General Description Features and Benefits The IDM2901 4-bit bipolar microprocessor slice is a

phase controller L120

Abstract: AMD flash ETOX
Contextual Info: SHARP PRODUCT PREVIEW Rev. 1.3 LH28F160S3-L10/13 16-M BIT 2MBX8/1 MBx16 Sm art 3 Flash MEMORY • Smart 3 Technology — 2.7V or 3.3V Vcc — 2.7V, 3.3V or 5V VPP User-Configurable x8 or x16 Operation ■ Common Flash interface (CFI) — Universal & Upgradable Interface

MAX7218

Abstract: LQ 450 led segment MAX7218A icm7218aipi 7218A ICM7218CIPI ICM7218 ICM721BA ICM7218A 7 segment common anode decoder using mux
Contextual Info: y k iy jx iy k i 8 D ig it LED D isplay D river _ Features The Maxim ICM7218 display driver interfaces m icro­ processors to an 8 digit, 7 segment, numeric LED display. Included on chip are two types of 7 segment decoders, multiplex scan circuitry, segment and digit

MAX456CPL

Contextual Info: 19-2858; Rev2:2/94 8 x 8 Video Cro ss po in t S w i t c h _ F e a t u r e s ♦ Routes Any Input Channel to Any O utput Channel Three-state output ca p a bility and internal, program m a­ b le a c tive loads m ake it fe a sib le to p a ra lle l m u ltip le

k22 sot23

Abstract: semiconductor date Code smd-transistor
Contextual Info: Labeling Specification LABEL SPECS 167 Labeling Specification Central Semiconductor Corp. www.centralsemi.com CENTRAL - ® - 1.0 Purpose: Sem iconductor Devices C M K T 2 2 2 2 A TR ITEM. SMD-TRANSISTOR D E S C R IP T IO N . ®"pr ~ Discrete CUSTOMER ITEM.

M5M41001AJ-12

Abstract: L-12
Contextual Info: MITSUBISHI LSIs M5M41001AP,J,L-8,-10,-12 N IB B LE M O D E 1 0 4 8 5 7 6 -B I T 1 0 4 8 5 7 6 -W 0 R D B Y 1-BIT DYNAM IC R A M D E S C R IP T IO N . This is a fam ily of 1048576-word by 1-bit dynam ic RAM s, PIN C O N F IG U R A T IO N (TO P V IE W ) fabricated with the high performance C M O S process, and

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MCM62973A Product Preview 4 K x 1 2 Bit Synchronous S ta tic R A M with Output Registers The MCM62973A is a 49,152 b it synchronous static random access m em ory organized as 4096 w ords o f 12 bits, fabricated using M o to rola 's second-generation high-perform ance

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MCM511002A 1M x 1 CM OS Dynamic RAM Static Column P PACKAGE 300 M IL PLASTIC CA SE 707A The MCM511002A is a 1.0/a CM O S high-speed, dynamic random access memory. It is organized as 1,048,576 one-bit w ords and fabricated with CM O S silicon-gate process

LA 4108

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 16K x 4 Bit Synchronous Static RAM With Output Registers and Output Enable The M C M 6294 is a 65,536 bit syn chro n o us static random access m em ory organized as 16,384 w ords of 4 bits, fabricated using M otorola's second-generation h ig h -p er­

7412S

Abstract: 10421 10429 s 10430 ICL7115 ICL7115JCDL ICL7115JIDL ICL7115JMDL ICL7115JMLL ICL7115KIDL
Contextual Info: I G E SOLID STATE D1 ICL7113 3875081 G E S O LID DEl3fl7S0fll 0D10417 2 STATE 01E 10417 ICL7115 1 4-B it High-Speed CMOS ju,P-Compatible A /D Converter T - S /- W - 9 0 GENERAL DESCRIPTION FEATURES The ICL7115 is the first monolithic 14-bit resolution, fast

Contextual Info: DP8409A 39 National Semiconductor DP8409A Multi-Mode Dynamic RAM Controller/Driver General Description Operational Features Dynamic memory system designs, which formerly required several support chips to drive the memory array, can now be implemented with a single 1C . . . the DP8409A MultiMode Dynamic RAM Controller/Driver. The DP8409A is ca­

HD64400

Abstract: stpr 10 cf
Contextual Info: HD64400 GDP Graphic Data Processor Description T he H D 64400 is a g raphic data p ro cessin g chip w ith h ig h - s p e e d d r a w in g f u n c tio n s a n d a n extensive set o f display functions. It c an c o n tro l a w id e ra n g e o f ra ster-sc a n C R T

bx-upi

Abstract: 271062 "FRC"
Contextual Info: M W Â K K S E O ßiO IFÜ K lM lÄ TD ^ in te * M82965 FAULT TOLERANT BUS EXTENSION UNIT Military Multiprocessor Support — Connect up to 32 Processor and Memory Modules In a Single System Multiple Bus Support with No External Logic — Connect up to Four 32-Bit Buses for