54LS03 Search Results

54LS03

Abstract: 54LS03DMQB 54LS03FMQB 54LS03LMQB DM54LS03J DM54LS03W DM74LS03M DM74LS03N E20A J14A
Contextual Info: LS03 National Semiconductor 54LS03/54LS03/DM74LS03 Quad 2-Input NAND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates each of which performs the logic NAND function. The open-collector out­

54LS03

Abstract: 54LS03DMQB 54LS03FMQB 54LS03LMQB DM54LS03 DM54LS03J DM54LS03W DM74LS03 DM74LS03M DM74LS03N
Contextual Info: 54LS03 54LS03 DM74LS03 Quad 2-Input NAND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates each of which performs the logic NAND function The open-collector outputs require external pull-up resistors for proper logical operation

Contextual Info: g M O TO R O LA Military 54LS03 Quad 2-Input NAND Gate MP0 ELECTRICALLY TESTED PER: MIL-M-38510/30002 mint LOGIC DIAGRAM Vq c B4 fîjl A4 Y4 B3 A3 Y3 Häl RTl fïïïl fïïl fsl AVAILABLE AS: 1) JAN: JM38510/30002BXA 2) SMD: N/A 3)883: 54LS03/BXAJC LÜ

dm8130

Abstract: 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76
Contextual Info: 19 7 6 N atio n al S e m ico n d u cto r C o rp . p 1 ? I m • ' % TTL Data Book D EV IC E MIL i 2502 2503 2504 5400 54H00 54L00 54LS00 5401 54H01 54L01 54LS01 5402 54L02 54LS02 5403 54L03 54LS03 5404 54H04 54L04 54LS04 5405 54H05 54L05 54LS05 5406 5407 5408

Contextual Info: June 1989 54LS03/54LS03/DM74LS03 Quad 2-Input NAND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates each of which performs the logic NAND function. The open-collector out­ puts require external pull-up resistors for proper logical op­

Contextual Info: LS03 National Semiconductor 54LS03/54LS03/DM74LS03 Quad 2-Input NAND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates each of which performs the logic NAND function. The open-collector out­

cd 4061

Abstract: QN08 54LS03 54LS03DMQB 54LS03FMQB 54LS03LMQB DM54LS03J DM54LS03W DM74LS03M DM74LS03N
Contextual Info: June 1989 Semiconductor 54LS03/54LS03/DM74LS03 Quad 2-Input NAND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains lour independent gates each of which performs the logic NAND function. The open-collector out­

Contextual Info: M MOTOROLA M ilita ry 54LS 03 Quad 2-In p u t NAND G ate MP0 mini ELECTRICALLY TESTED PER: MIL-M-38510/30002 LOGIC DIAGRAM Vcc B4 A4 Y4 B3 A3 Y3 AVAILABLE AS: 1) JAN: JM38510/30002BXA 2) SMD: N/A 3)883: 54LS03/BXAJC X = CASE OUTLINE AS FOLLOWS: PACKAGE: CERDIP: C

B410

Contextual Info: M MOTOROLA Military 54LS03 Quad 2-Input NAND Gate MPO mini ELECTRICALLY TESTED PER: MIL-M-38510/30002 AVAILABLE AS . LOGIC DIAGRAM \C fu] B4 A4 Y4 pj] ¡17] [TT] B3 A3 V3 1) JAN: JM38510/30002BXA 2) SMD: * 3) 883C: 54LS03/BXAJC [y | |T1 IT] -io 1 lio 1 Ll I

7403PC

Abstract: 74LS03 74LS03PC 7403DC 7403FC 74LS03DC 74LS03FC 74S03DC 74S03FC 74S03PC
Contextual Info: 03 C O N N E C T IO N D IA G R A M P IN O U T A 54/7403 v * _ '-'54S/74S03 54LS/74LS03 rs/'J? • Q U A D 2 -IN P U T N AN D GATE W ith O p e n -C o lle cto r Output O R D E R IN G C O D E : See S e ctio n 9 PIN PKGS OUT C O M M E R C IA L GRADE M ILITA R Y G RADE

54L03

Contextual Info: TYPES SN5403, SN54L03, 54LS03, SN54S03, SN7403, SN74LS03, SN74S03 QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS R E V IS E D D E C E M B E R 1983 SN 5403, SN 54L03 . . . J PACKAG E S d 5 4 L S 0 3 , S N 5 4 S 0 3 . . J OR W P A C K A G E

LM 331 N NSC

Abstract: 54LS03 54LS03DMQB 54LS03FMQB 54LS03LMQB DM54LS03J DM54LS03W DM74LS03 DM74LS03M DM74LS03N
Contextual Info: S E M IC O N D U C T O R tm DM74LS03 Quad 2-Input NAND Gates with Open-Collector Outputs General Description Pull-U p Resistor Equations This device contains four independent gates each of which performs the logic NAND function. The open-collector out­ puts require external pull-up resistors for proper logical op­

74s188 programming

Abstract: 74S471 N82S06 74S470 dip18 package str 52100 MARKING CODE N-CHANNEL MOS FIELD EFFECT TRANSISTOR 74S472 PROM PROGRAMMING 8080a 74S287 programming instructions
Contextual Info: The E ngineering Staff of TEXAS INSTRUMENTS INCORPORATED Semiconductor Memory Data Book y for \ T exas In Design Engineers s t r u m e n t s >le of Contents • Alphanumeric Index • GENERAL INFORMATION Selection Guides • Glossary INTERCHANGEABILITY GUIDE

74LS115

Abstract: 74LS273 74LS189 equivalent 74LS00 QUAD 2-INPUT NAND GATE 74LS265 fan-in and fan out of 7486 74LS93A 74LS181 74LS247 replacement MR 31 relay
Contextual Info: F A IR C H IL D LOW POWER S C H O T T K Y D A TA BOOK ERRATA SHEET 1977 Device Page Item Schematic 2-5 Figure 2-6. Blocking diode in upper right is reversed. Also, diode con­ necting first darlington emitter to output should have series resistor. LS33 5-25

DM74367

Abstract: 54175 71ls97 DM74109 DM8160 om541 ci 8602 gn block diagram 5401 DM transistor 74L10 74S136
Contextual Info: N ational Semiconductor Section 1 - 54/74 SSI DEVICES Connection Diagram s • Electrical Tables Section 2 - 54/74 M SI DEVICES Section 3 - National Semiconductor PROPRIETARY DEVICES Section 4 - National Semiconductor ADDITIONAL D EV KES t o NATIONAL Manufactured under one or more of the fo llowing U.S. patents: 3083262, 3189758, 3231797 , 3303356, 3317671, 3323071, 3381071, 3408542, 3421025, 3426423, 3440498, 3518750, 3519897, 3557431, 3560765,

IC 74LS03

Contextual Info: N ATION AL S EM IC O N D {LOGIC* 02E D | b S O lia E □ □ t.3 ti4 □ 03 J - Y 3 -/y CO NNECTIO N DIAGRAM PINO UT A 54/7403 54S/74S03 54LS/74LS03 QUAD 2-INPUT NAND GATE With Open-Collector Output ORDERING CODE: See Section 9 PIN PKGS CO M M ERC IAL GRADE

Contextual Info: INCH-POUND MIL-M-38510/300E 7 JANUARY 2003_ SUPERSEDING MIL-M-38510/300D 15 JULY 1987 MILITARY SPECIFICATION MICROCIRCUITS, DIGITAL, BIPOLAR LOW-POWER SCHOTTKY TTL, AND GATES, MONOLITHIC SILICON Inactive for new design after 18 April 1997. This specification is approved for use by all Departments

MIL-M-35810

Abstract: Z6 ITT Z8 ITT MIL-M-3B510
Contextual Info: H1L-M-38510/300D 15 JULY 1967 s n m s n n n -MIL-M-38510/300C 9 A u g u s t 1983 MILITARY MICROCIRCUITS, DIGITAL, BIPOLAR, LOW-POWER SCHOTTKY, NAND GATES, MONOLITHIC SILICON Th i s s p e c i f i c a t i o n is nents and Agencies 1. SPECIFICATION TTL, a p p r o v e d f o r u s e by all D e p a r t *

Contextual Info: TYPES SN5403, SN54L03, 54LS03, SN54S03, SN7403, SN74LS03, SN74S03 QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS REVISED DECEMBER 1983 Package Options Include Both Plastic and Ceramic Chip Carriers in Addition to Plastic and Ceramic DIPs

LG color tv Circuit Diagram schematics

Abstract: texas ttl YJ 162A Texas Instruments TTL integrated circuits catalog SN74180 AC digital voltmeter using 7107 Sii 9024 MC3123 sn74ls860 SN7490AJ sn74243
Contextual Info: IN D EXES Alphanumeric • Functional/Selection Guide IN T E R C H A N G E A B ILIT Y GUIDE G E N E R A L INFORM ATION O RD ERIN G IN STRUCTIO N S AND M ECH A N ICA L D A TA 5 4 /7 4 FA M ILIE S OF CO M PATIBLE T T L C IR C U ITS 54/74 F A M IL Y SSI C IR C U ITS

54S38

Abstract: SN74298 SN74265 54175 NES 1004 naval specification 74L95 Transistor AF 138 07802-1 SN7437 SN54LS195A
Contextual Info: m - G EN ER A L IN F O R M A TIO N INDEXES Numerical • Functional/Selection Guide O R D E R IN G INSTRUCTIO NS A N D M E C H A N IC A L D ATA 1 1 5 4/74 F A M IL Y SSI C IR CU ITS 2 I 54/74 F A M IL Y M S I/LSI C IR C U ITS 3 S E R IE S 29000 S S I C IR C U IT S

ay-5-1012

Abstract: ali m 3329 PROCESSOR ALI 3329 ali 3329 b ali 3329 SN74188 sn74s188 str 52100 SN7452 replacement of bel 187 transistor
Contextual Info: GENERAL INFORMATION lie of Contents • Alphanumeric Index • Selection Guides • Glossary INTERCHANGEABiliTY GUIDE MOS MEMORIES TTL MEMORIES ECl MEMORIES MICROPROCESSOR SUMMARY 38510/MACH IV PROCUREMENT SPECIFICATION JAN Mll-M-38510 INTEGRATED CIRCUITS

Contextual Info: S E M IC O N D U C T O R tm DM74LS03 Quad 2-Input NAND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains fo u r independent gates each of which perform s th e logic NAND function. The o pen-collector out­

multiplexers 74 LS 150

Abstract: 74LS255 74LS190 up down decade counter 74LS190 pins bcd counter 74 90 74LS192 pins 74LS191 74LS221 LS386 ls95b
Contextual Info: Digital Circuits 9LS/54LS/74LS Low Power Schottky Cont. Description Type Number Prop Delay1 (ns) or Max. Op. Freq. (MHz)2 Available Packages Pwr Oiss. (mW) 9LS/54LS/74LS190 9LS/54LS/74LS191 9LS/54LS/74LS192 9LS/54LS/74LS193 9 LS/54 LS/74 LSI 94 A BCD decade counter, mode control