8253/8254
Abstract: md 8243 ITT301 6168 sc 8254 AA lt 8239 signetics B197 B236 B237
Contextual Info: Signetics Integrated C ircuits-Lo w Power Schottky T T L TYPE NO. d e s c r ip t io n STO C K NO. N74LS 260N N 74LS261N IN74LS266N Dual 5 -In p u t NO R Gate M u ltip ly Decoder Quad Exclusive NOR 5S 735A 55 7 3 6 X 5 57 37H O U T L IN E DRW G. NO. 1 2 1 M 74LS273N
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n74ls260n5735an74ls261n55736x+16n74ls266n5s737hm74ls273n55738fm74ls279nn74ls283n8253/8254md 8243itt3016168 sc8254 aalt 8239signeticsb197b236b237
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74ls series logic family
Abstract: SN74HC logic family CMOS 4000 TTL 74ALS CMOS 4000 Series family cmos logic 4000 series 74LS TTL 245 74ls TTL family 74ls series family cross reference cmos 4000
Contextual Info: INTEGRAL KOREA Cross Reference Characteristics Technology IK Semi Hitachi IN74 TTL CMOS 4000 On Semi Toshiba TI Philips Fairchild SN74 SN74 SN74 74 DM74 IN74LS HD74LS SN74LS SN74LS SN74LS 74LS DM74LS IN74ALS HD74ALS SN74ALS SN74ALS SN74ALS 74ALS DM74ALS IW4
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hd74lssn74lsdm74lsin74als+12hd74alssn74als74ls series logic familysn74hc logic familycmos 4000ttl 74alscmos 4000 series familycmos logic 4000 series74ls ttl 24574ls ttl family74ls series familycross reference cmos 4000
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cmos logic 4000 series
Abstract: TTL 74ALS 74 series TTL NOT gate MM74HC CMOS 4000 Series family 74ls series logic family CMOS 4000 SN74HC logic family 74ls TTL family 74ALS
Contextual Info: z Cross Reference Characteristics Technology IK Semi Hitachi IN74 TTL CMOS 4000 On Semi Toshiba TI Philips Fairchild SN74 SN74 SN74 74 DM74 IN74LS HD74LS SN74LS SN74LS SN74LS 74LS DM74LS IN74ALS HD74ALS SN74ALS SN74ALS SN74ALS 74ALS DM74ALS IW4 HD14 MC14 TC4
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hd74lssn74lsdm74lsin74als+12hd74alssn74alscmos logic 4000 seriesttl 74als74 series ttl not gatemm74hccmos 4000 series family74ls series logic familycmos 4000sn74hc logic family74ls ttl family74als
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IN74LS138N
Abstract: 1N3064 1N916 IN74LS138D
Contextual Info: TECHNICAL DATA IN74LS138 3-to-8-Line Decoder/Demultiplexer This schottky-clamped TTL MSI circuit is designed to be used in high-performance memory-decording or data-routing applications requiring very short propagation delay time. In high-performance memory systems this decode can be used to minimize the effects of
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in74ls1381n9161n3064in74ls138n+1in74ls138d
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IN74LS06
Abstract: IN74LS06D IN74LS06N
Contextual Info: TECHNICAL DATA IN74LS06 Hex Inverted Buffers with Open-Collector Outputs This device contains hex inverted buffers with open-collector. It performs the Boolean function Y=A in positive Logic. • High Output Voltage 30 V • High Speed ( tPD = 8.5 ns typical)
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in74ls06in74ls06nin74ls06d |
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1N3064
Abstract: 1N916 IN74LS86D IN74LS86N
Contextual Info: TECHNICAL DATA IN74LS86 Quad 2-Input Exclusive OR Gate This device contains four independent 2-input Exclusive-OR gates. It performs the Boolean functions Y=A ⊕ B=AB+AB in positive logic. ORDERING INFORMATION IN74LS86N Plastic IN74LS86D SOIC TA = 0° to 70° C for all
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in74ls86in74ls86nin74ls86d1n916+11n3064
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1N3064
Abstract: 1N916 IN74LS244 IN74LS244DW IN74LS244N
Contextual Info: TECHNICAL DATA IN74LS244 Octal 3-State Noninverting Buffer/Line Driver/Line Receiver These octal buffers and line drivers and designed specifically to improve both the performance and density of three-state memory address drivers, clock drivers, and busoriented receivers and
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in74ls244in74ls244nin74ls244dw1n916+11n3064
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1N3064
Abstract: 1N916 IN74LS138D IN74LS138N
Contextual Info: TECHNICAL DATA IN74LS138 3-to-8-Line Decoder/Demultiplexer This schottky-clamped TTL MSI circuit is designed to be used in high-performance memory-decording or data-routing applications requiring very short propagation delay time. In high-performance memory systems this decode can be used to minimize the effects of
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in74ls1381n9161n3064in74ls138d+1in74ls138n
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IN74LS05D
Abstract: IN74LS05 IN74LS05N
Contextual Info: TECHNICAL DATA IN74LS05 Hex Inverters with Open-Drain Outputs This device contains idenpendent inverts. It performs the Boolean function Y=A. The open collector outputs require pull-up resistor to perform correctly. Open-collector devices are often used to generate
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1N3064
Abstract: 1N916 IN74LS86D IN74LS86N
Contextual Info: TECHNICAL DATA IN74LS86 Quad 2-Input Exclusive OR Gate This device contains four independent 2-input Exclusive-OR gates. It performs the Boolean functions Y=A ⊕ B=AB+AB in positive logic. ORDERING INFORMATION IN74LS86N Plastic IN74LS86D SOIC TA = 0° to 70° C for all packages
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in74ls86in74ls86nin74ls86d012ab+21n30641n916
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1N3064
Abstract: 1N916 IN74LS244 IN74LS244DW IN74LS244N
Contextual Info: TECHNICAL DATA IN74LS244 Octal 3-State Noninverting Buffer/Line Driver/Line Receiver These octal buffers and line drivers and designed specifically to improve both the performance and density of three-state memory address drivers, clock drivers, and busoriented receivers and transmitters.
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in74ls244in74ls244nin74ls244dw013ac+21n30641n916
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1N3064
Abstract: 1N916 IN74LS164 IN74LS164D IN74LS164N
Contextual Info: TECHNICAL DATA IN74LS164 8-Bit Serial-Input/Parallel-Output Shift Register This 8-bit shift register features gated serial inputs and an asynchronous reset. The gated serial inputs A and B permit complete control over incoming data as a low at either (or both) input(s) inhibits
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in74ls1641n9161n3064in74ls164d+1in74ls164n
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1N3064
Abstract: 1N916 IN74LS14D IN74LS14N
Contextual Info: TECHNICAL DATA IN74LS14 Hex Schmitt-Trigger Inverter This device contains six independent gates each of which performs the logic INVERT function. Each input has hysteresis which increases the noise immunity and transforms a slowly changing input signal to a
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in74ls14in74ls14nin74ls14d1n916+11n3064
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1N3064
Abstract: 1N916 IN74LS161D IN74LS161N
Contextual Info: TECHNICAL DATA IN74LS161 Synchronous 4 Bit Counters; Binary, Direct Reset This synchronous, presettable counter features an internal carry look-ahead for application in high-speed counting designs. Synchronous operation is provided by having all flip-flops clocked
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1N3064
Abstract: 1N916 IN74LS157D IN74LS157N LS157 LS257
Contextual Info: TECHNICAL DATA IN74LS157 Quad 2-Input Data Selector/Multiplexer This monolitic data selector/multiplexer contains inverters and drivers to supply full on-chip data selection to the four output gates. A separate strobe input is provided. A 4-bit word is selected from
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in74ls157ls157ls257in74ls157n+3in74ls157d1n9161n3064
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IN74LS07N
Abstract: IN74LS07D IN74LS07
Contextual Info: TECHNICAL DATA IN74LS07 Hex Non-Inverted Buffers with OpenCollector Outputs This device contains hex non inverted buffers with open-collector. It performs the Boolean function Y=A in positive Logic. • High Output Voltage 30 V • High Speed ( tPD = 12 ns typical)
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in74ls07in74ls07nin74ls07d |
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1N3064
Abstract: 1N916 IN74LS86D IN74LS86N
Contextual Info: TECHNICAL DATA IN74LS86 Quad 2-Input Exclusive OR Gate This device contains four independent 2-input Exclusive-OR gates. It performs the Boolean functions Y=A ⊕ B=AB+AB in positive logic. ORDERING INFORMATION IN74LS86N Plastic IN74LS86D SOIC TA = 0° to 70° C for all
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in74ls86in74ls86nin74ls86d1n916+11n3064
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IN74LS244
Abstract: IN74LS244N 1N3064 1N916 IN74LS244DW
Contextual Info: TECHNICAL DATA IN74LS244 Octal 3-State Noninverting Buffer/Line Driver/Line Receiver These octal buffers and line drivers and designed specifically to improve both the performance and density of three-state memory address drivers, clock drivers, and busoriented receivers and
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in74ls244in74ls244nin74ls244dw1n916+11n3064
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1N3064
Abstract: 1N916 IN74LS164 IN74LS164D IN74LS164N
Contextual Info: TECHNICAL DATA IN74LS164 8-Bit Serial-Input/Parallel-Output Shift Register This 8-bit shift register features gated serial inputs and an asynchronous reset. The gated serial inputs A and B permit complete control over incoming data as a low at either (or both)
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in74ls1641n9161n3064in74ls164d+1in74ls164n
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IN74LS06N
Abstract: IN74LS06D IN74LS06
Contextual Info: TECHNICAL DATA IN74LS06 Hex Inverted Buffers with Open-Collector Outputs This device contains hex inverted buffers with open-collector. It performs the Boolean function Y=A in positive Logic. • High Output Voltage 30 V • High Speed ( tPD = 8.5 ns typical)
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IN74LS245N
Abstract: 1N3064 1N916 IN74LS245DW
Contextual Info: TECHNICAL DATA IN74LS245 Octal 3-State Noninverting Bus Transceiver These octal bus transceiver are designed for asynchronous twoway communication between data buses. The control function implementation minimized external timing requirements. The device allows data transmission from the A bus to the B bus
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in74ls24520-pin1n9161n3064+2in74ls245nin74ls245dw
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IN74LS161N
Abstract: 1N3064 1N916 IN74LS161D
Contextual Info: TECHNICAL DATA IN74LS161 Synchronous 4 Bit Counters; Binary, Direct Reset This synchronous, presettable counter features an internal carry look-ahead for application in high-speed counting designs. Synchronous operation is provided by having all flip-flops clocked
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in74ls1611n9161n3064in74ls161n+1in74ls161d
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1N3064
Abstract: 1N916 IN74LS14D IN74LS14N
Contextual Info: TECHNICAL DATA IN74LS14 Hex Schmitt-Trigger Inverter This device contains six independent gates each of which performs the logic INVERT function. Each input has hysteresis which increases the noise immunity and transforms a slowly changing input signal to a
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in74ls14in74ls14nin74ls14d1n916+11n3064
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1N3064
Abstract: 1N916 IN74LS245DW IN74LS245N
Contextual Info: TECHNICAL DATA IN74LS245 Octal 3-State Noninverting Bus Transceiver These octal bus transceiver are designed for asynchronous two-way communication between data buses. The control function implementation minimized external timing requirements. The device allows data transmission from the A bus to the B bus or
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in74ls24520-pin1n9161n3064+2in74ls245dwin74ls245n
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