DATA14 Search Results

RJ113BZ

Abstract: fb0805 WIZ830MJ w5300 120R-100MHZ 0.1uF RD 1V RJ113 OSC25I A3A1
Contextual Info: 5 4 3V3A 1V8A 3.3V 3 2 1 1V8D 1V8D 3.3V 3.3V 1V8A 3V3A FB2 66 /RESET BIT16EN 18 BIT16EN D 15 D 14 D 13 D 12 D 11 D 10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 28 29 30 31 32 33 34 35 38 39 40 41 42 43 44 45 DATA15 DATA14 DATA13 DATA12 DATA11 DATA10 DATA9 DATA8 DATA7

SMD code PJ7

Contextual Info: MC9S12C32 Easy Reference SCI Multiplexed Address/Data Bus DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 DATA15 DATA14 DATA13 DATA12 DATA11 DATA10 DATA9 DATA8 MSCAN SPI RXCAN TXCAN MISO MOSI SS SCK PP4/KWP4/PW4 PP5/KWP5/PW5 PP7/KWP7 VDDX VSSX PM0/RXCAN PM1/TXCAN

32 PIN

Contextual Info: Low Power SR A M Selection Guide 1/ 2 Maximum supply current Access time Capacity Organization Version Part number Operating Standby |mA| (j/A) Data14”*“1 retention (/»A) 70 (70 ns. 85 ns. 100 ns) 100 15 CZ: 32-pin DIP (600mil). GW: 32-pin SOP <525mii)

TXC07900AIBG

Abstract: TXC-07900AIBG TSOP transmitter B020H OED155TM TXC-07900-MB VTXP-6 AU-AIS dk12b EK117
Contextual Info: OED155 Device Dual STM-1 Overhead Terminator, Tributary Processor and Cross-Connect with Integrated E1 Mapper TXC-07900 PRODUCT PREVIEW DATA SHEET DESCRIPTION: ™ The Optimized Edge Device, OED155, is a dual STM-1 SDH framer and overhead terminator, virtual tributary

83c chipset

Contextual Info: Contents Section 1 2 3 Title Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TSB41LV03

Contextual Info: TSB12LV01A / TSB12LV01AI Data Manual IEEE 1394-1995 High-Speed Serial-Bus Link-Layer Controller Sourced from: SLLS332A February 2000 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue

SLLA081

Abstract: paccom ev app abstract
Contextual Info: TSB12LV01BĆEP IEEE 1394Ć1995 HighĆSpeed SerialĆBus LinkĆLayer Controller Data Manual July 2002 Mixed Signal Products SGLS123 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications,

AM37xx

Abstract: SPRS616F bt.656 to MIPI digital cvbs encoder 640 480 RGB mipi bridge Cortex-A8 MIPI E2 nand flash 683 Transistor
Contextual Info: AM3715, AM3703 SPRS616F – JUNE 2010 – REVISED AUGUST 2011 www.ti.com AM3715, AM3703 Sitara ARM Microprocessors Check for Samples: AM3715, AM3703 1 AM3715, AM3703 Sitara ARM Microprocessors 1.1 Features 123456 • AM3715/03 Sitara ARM Microprocessors: – Compatible with OMAP 3 Architecture

FC-135 32.7680KA-A0

Abstract: FC-135 32.7680KA FC-135 32,7680KA half bridge converter 2kw FC-135 32,7680KA-a0 BAT54SWTI br 8772 sdc 802 diode 32.7680ka-a0
Contextual Info: AD S1 258 ADS1258-EP SBAS445D – MARCH 2009 – REVISED MARCH 2011 www.ti.com 16-CHANNEL, 24-BIT ANALOG-TO-DIGITAL CONVERTER Check for Samples: ADS1258-EP FEATURES 1 • • • • • • • • • • 23 • • • • • • • • 24 Bits, No Missing Codes

Contextual Info: KSZ9692MPB/KSZ9692XPB Integrated Gigabit Networking and Communications Controller General Description The KSZ9692MPB/KSZ9692XPB is a highly integrated System-on-Chip SoC containing an ARM 922T 32-bit processor and a rich set of peripherals to address the costsensitive, high-performance needs of a wide variety of high

TSB12LV01A

Abstract: TSB12LV01B TSB12LV01BIPZTEP
Contextual Info: TSB12LV01BĆEP IEEE 1394Ć1995 HighĆSpeed SerialĆBus LinkĆLayer Controller Data Manual July 2002 Mixed Signal Products SGLS123 Contents Section Title Page 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

dspic30f4011 motor control example codes

Abstract: dspic30f4011 pwm threephase DS70046 DS70157 PIC32 PICC-18 CH123SA UART dspic30f4011 DS70135G SCHEMATIC scaler mcu lvds control
Contextual Info: dsPIC30F4011/4012 Data Sheet High-Performance, 16-Bit Digital Signal Controllers 2010 Microchip Technology Inc. DS70135G Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet.

SPR154

Abstract: MPC509 ef80 FC-24
Contextual Info: Freescale Semiconductor, Inc. MOTOROLA Order this document by MPC509TS/D SEMICONDUCTOR TECHNICAL DATA MPC509 Technical Summary Freescale Semiconductor, Inc. PowerPC MPC509 RISC Microcontroller The MPC509 is a member of the PowerPC Family of reduced instruction set computer RISC microcontrollers (MCUs). The MPC509 implements the 32-bit portion of the PowerPC architecture, which provides 32-bit effective addresses, integer data types of 8, 16, and 32 bits, and floating-point data types

ADSP-21489 user manual

Abstract: ADSP-21487 sharc ADSP-214xx FFT Accelerator medialb ADSP-21160 ADSP-21161 ADSP-21489 ADSP21487 sharc iir filter IBIS Model diode
Contextual Info: SHARC Processor SUMMARY The ADSP-2148x processors are available with unique audiocentric peripherals, such as the digital applications interface, serial ports, precision clock generators, S/PDIF transceiver, asynchronous sample rate converters, input

Realtek PCI LAN 8101L

Abstract: 9346CR RTL8101L RTL8139 BootROM rt8101l lan card RTL8100 RTL8139A RTL8101L modem RTL810 8101L
Contextual Info: RTL8101L 1. Features: 1.1 Ethernet Controller Features: wake-up when main power remains off Supports auxiliary power auto-detect, and sets the related capability of power management registers in PCI configuration space Includes a programmable PCI burst size and early Tx/Rx

ande RY 192

Abstract: ande RY 228 ande RY 227 mov rdn 240 DB14-000121-00
Contextual Info: LSI402Z Digital Signal Processor User’s Guide May 2000 Order Number R14014 LSI Logic Confidential This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties

SuperSPARC

Abstract: Mbus master 250 slave circuit tmx390 STP1091-60
Contextual Info: S un M icroelectronics July 1997 Multi-Cache Controller DATA SHEET Integrated Cache Controller for SuperSPARC D e s c r ip t io n The STP1091 is a high-performance external cache controller for the STP1020 SuperSPARC and STP1021 (SuperSPARC-II) microprocessors. It is used when a large secondary cache or an interface to a non-MBus sys­

MPPC 001

Abstract: MPPC 001 ci mppc CADDR15 9711S 9711PT4
Contextual Info: 9711 Data Compression Processor Hi/fnTM supplies two of the Internet’s most important raw materials: compression and encryption. Hi/fn is also the world’s first company to put both on a single chip, creating a processor that performs compression and encryption at

Contextual Info: MC9S12XDP512 Data Sheet HCS12X Microcontrollers MC9S12XDP512 Rev. 2.10 5/2005 freescale.com MC9S12XDP512 Data Sheet covers MC9S12XDT384 & MC9S12XA512 MC9S12XDP512V2 Rev. 2.10 5/2005 To provide the most up-to-date information, the revision of our documents on the World Wide Web will be

Contextual Info: MC9S12XDP512 Data Sheet HCS12X Microcontrollers MC9S12XDP512 Rev. 2.09 5/2005 freescale.com MC9S12XDP512 Data Sheet covers MC9S12XDT384 & MC9S12XA512 MC9S12XDP512V2 Rev. 2.09 5/2005 To provide the most up-to-date information, the revision of our documents on the World Wide Web will be

Contextual Info: Freescale Semiconductor, Inc. DOCUMENT NUMBER MC9S12KG128 Freescale Semiconductor, Inc. MC9S12KG128 SoC Guide V01.01 Original Release Date: 16 JUL 2002 Revised: 08 MAR 2002 Motorola, Inc. Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design.

IMX6DQ6SDLSRM

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: IMX6DQIEC Rev. 2.3, 07/2013 MCIMX6QxCxxxxC MCIMX6DxCxxxxC i.MX 6Dual/6Quad Applications Processors for Industrial Products Package Information Case FCPBGA 21 x 21 mm, 0.8 mm pitch Ordering Information

LSI403LP

Contextual Info: Preliminary – Content Subject to Change LSI403LP Digital Signal Processor Preliminary Datasheet The LSI403LP is a 16-bit, fixed-point digital signal processor DSP based on the ZSP 400 DSP core. The LSI403LP contains an entire DSP system on a single chip, and is designed for applications requiring lower

Contextual Info: DOCUMENT NUMBER 9S12H256BDGV1/D MC9S12H256 Device User Guide V01.16 Original Release Date: 29 SEP 2000 Revised: 05 NOV 2003 Motorola, Inc Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or