AC273 Search Results

Contextual Info: AC273, 74ACT273 Octal D-Type Flip-Flop Features General Description • Ideal buffer for microprocessor or memory The AC273 and ACT273 have eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The common buffered Clock CP and Master

AC2092

Abstract: AC2091 M1-0412ME M1-0420ME UTO507 TL9014 M1_0412ME AC545 GPD462 AVANTEK utc5
Contextual Info: Teledyne / Cougar Cross Reference List Cougar SPECTRUM MICROWAVE Cougar SPECTRUM MICROWAVE Cougar SPECTRUM MICROWAVE AC105 ACH107 AP148 AC251 AC262 AC263 AC271 AC272 AC273 AC281 AC282 AC293 AP294 AC305 AC345 AC347 AP348 AR356 AC378 AC379 AC380 AC381 AC382

74AC273

Abstract: 74AC273MTC 74AC273PC 74AC273SC 74AC273SJ 74ACT273 74ACT273SC 74ACT273SJ AC273 ACT273
Contextual Info: Revised March 2005 AC273 • 74ACT273 Octal D-Type Flip-Flop General Description Features The AC273 and ACT273 have eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input

ACT273

Contextual Info: AC273 • ACT273 54AC/AC273 • 54ACT/74ACT273 Octal D Flip-Flop Description Connection Diagrams The ’AC/’ACT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) inputs load and reset (clear) all flip-flops

Contextual Info: 2/99 AC271 AC273 10 TO 250 MHz TO-8 CASCADABLE AMPLIFIERS AC271 AC273 Low Noise Figure . . . . . . . . . . . . . . . . . . . . . . . . 1.5 dB Medium Output Level. . . . . . . . . . . . . . . . . . . . . +14.0 dBm High Third Order I.P. . . . . . . . . . . . . . . . . . . . . . +30.0 dBm

Contextual Info: 2/99 AC271 AC273 10 TO 250 MHz TO-8 CASCADABLE AMPLIFIERS AC271 AC273 Low Noise Figure. . . . . . . . . . . . . . . . . . . . . . . 1.5 dB Medium Output Level. . . . . . . . . . . . . . . . . . . . +14.0 dBm High Third Order I.P. . . . . . . . . . . . . . . . . . . . . +30.0 dBm

AVANTEK utc5

Abstract: AVANTEK gpd402 TL9014 anzac AM 108 AVANTEK utc11 anzac AM 143 TM725 PA381 UTC5-133 ut0516
Contextual Info: COUGAR COMPONENTS DIRECT CROSS LIST Cougar Amplifonix Cougar Amplifonix Cougar Amplifonix Cougar Amplifonix AC 105 AC 107 AC251 AC271 AC272 AC273 AC281 AC282 AC293 AC305 AC345 AC347 AC378 AC379 AC380 AC381 AC382 AC383 AC386 AC391 AC437 AC453 AC457 AC487 AC501

Contextual Info: 6/92 _ Kln , j O aU B H R ' C O M 2225-K Martin Avenue, Santa Clara, CA 95050 FAX P O N E N T S 408 492-1400 (408)492-1500 M fG Ê T ll 10 to 250 MHz  G 2 7 ÎJ TO-8 Cascadable Amplifiers AC271 AC273 Low Noise Figure .

Contextual Info: AC273 Octal D-Type Flip-Flop General Description The AC273 has eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The common buff­ ered Clock CP and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously.

AC273

Abstract: 74AC273 74AC273MTC 74AC273PC 74AC273SC 74AC273SJ M20D MTC20
Contextual Info: Revised December 1998 AC273 Octal D-Type Flip-Flop General Description The AC273 has eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously.

74AC273

Abstract: 74AC273MTC 74AC273PC 74AC273SC 74AC273SJ 74ACT273 74ACT273SC 74ACT273SJ AC273 ACT273
Contextual Info: AC273, 74ACT273 Octal D-Type Flip-Flop Features General Description • Ideal buffer for microprocessor or memory The AC273 and ACT273 have eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The common buffered Clock CP and Master

Contextual Info: 2/99 AC271 AC273 10 TO 250 MHz TO-8 CASCADABLE AMPLIFIERS AC271 AC273 Low Noise Figure . . . . . . . . . . . . . . . . . . . . . . . . 1.5 dB Medium Output Level. . . . . . . . . . . . . . . . . . . . . +14.0 dBm High Third Order I.P. . . . . . . . . . . . . . . . . . . . . . +30.0 dBm

74ACT273SC

Abstract: AC273 74AC273 74AC273MTC 74AC273PC 74AC273SC 74AC273SJ 74ACT273 74ACT273MTC ACT273
Contextual Info: Revised October 1999 AC273 • 74ACT273 Octal D-Type Flip-Flop General Description Features The AC273 and ACT273 have eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input

z273

Abstract: 54AC273 54AC273DMQB 54AC273FMQB 54AC273LMQB 54AC273WG-QML 5962-8775601RA AC273 5962-8775601
Contextual Info: MICROCIRCUIT DATA SHEET Original Creation Date: 07/01/96 Last Update Date: 03/18/02 Last Major Revision Date: 07/01/96 AC273-X REV 1C1 Octal D Flip-Flop General Description The AC273 has eight edge-triggered D-type flip-flops with individual D inputs and Q

Contextual Info: 7 ' P - . 2/99 W C ' C D O U M / / E P O N H E F N T i S AC271 AC273 1 T Typical Values Low Noise Figure. Medium Output L e v e l.

vhdl code hamming

Abstract: vhdl coding for hamming code vhdl code for pipelined matrix multiplication vhdl code for matrix multiplication vhdl code hamming ecc parity ECC SEC-DED Hamming code SRAM verilog code for matrix multiplication SECDED RTAX2000S vhdl code SECDED
Contextual Info: Application Note AC273 Using EDAC RAM for RadTolerant RTAX-S FPGAs and Axcelerator FPGAs Applies to EDAC Core from Libero IDE v7.1 or Older Introduction Actel's newest designed-for-space Field Programmable Gate Array FPGA family, the RTAX-S, is a highperformance, high-density antifuse-based FPGA with embedded user static RAM (SRAM). Based on Actel's

ACT273

Abstract: AC273
Contextual Info: AC273 • ACT273 54AC/AC273 • 54ACT/74ACT273 Octal D Flip-Flop Description Connection Diagrams The ’AC/’ACT273 has eight edge-triggered D-type flip-flops w ith individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (15ÎÏÏ) inputs load and reset (clear) all flip-flops

54AC273

Abstract: z273 54AC273DMQB 54AC273FMQB 54AC273LMQB AC273
Contextual Info: MICROCIRCUIT DATA SHEET Original Creation Date: 07/01/96 Last Update Date: 03/31/97 Last Major Revision Date: 07/01/96 AC273-X REV 1B0 Octal D Flip-Flop General Description The AC273 has eight edge-triggered D-type flip-flops with individual D inputs and Q

AC273

Abstract: flC271 AC27I AC27 AC271
Contextual Info: 6/92 _ W cnU EH H ' 2225-K Martin Avenue, Santa Clara, CA 95050 FAX ¡Z C J M P E J N E N T S 408 492-1400 (408) 492-1500 250 MHz $\(Ç?ÊWÊ TOS Cascadable Amplifiers C J 2 7 J 1 0 t o AC271 AC273 1.5 dB + 14.0 dBm + 30.0 dBm 2.4 dB

74AC273

Abstract: 74AC273MTC 74AC273PC 74AC273SC 74AC273SJ 74ACT273 74ACT273SC 74ACT273SJ AC273 ACT273
Contextual Info: Revised August 2000 AC273 • 74ACT273 Octal D-Type Flip-Flop General Description Features The AC273 and ACT273 have eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input

Contextual Info: 2/99 AC271 AC273 10 TO 250 MHz TO-8 CASCADABLE AMPLIFIERS AC271 AC273 Low Noise Figure. . . . . . . . . . . . . . . . . . . . . . . 1.5 dB Medium Output Level. . . . . . . . . . . . . . . . . . . . +14.0 dBm High Third Order I.P. . . . . . . . . . . . . . . . . . . . . +30.0 dBm

AC271

Abstract: AC273 as273
Contextual Info: Rev. 5/10 AC271 AC273 10 TO 250 MHz TO-8 CASCADABLE AMPLIFIERS AC271 AC273 1.5 dB +14.0 dBm +30.0 dBm 2.4 dB +20.5 dBm +36.0 dBm Typical Values Low Noise Figure . . . . . . . . . . . . . . . . . . . . . . . . Medium Output Level . . . . . . . . . . . . . . . . . . . . .

Contextual Info: AC273 • ACT273 54AC/AC273 • 54ACT/74ACT273 Octal D Flip-Flop Description Connection Diagrams The ’AC/’ACT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) inputs load and reset (clear) all flip-flops

Contextual Info: A I R C H November 1988 I L D Revised October 1999 S E M I C O N D U C T O R TM AC273 • 74ACT273 Octal D-Type Flip-Flop General Description Features The AC273 and ACT273 have eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The