AC27 Search Results

AC270

Abstract: verilog code for slave SPI with FPGA spi slave AFS090
Contextual Info: Application Note AC270 SPI Flash Emulation for Fusion Devices Design Example Contents General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

ASF600

Abstract: VHDL code of lcd display vhdl code for lcd display RTC A 250 2N2222A AC271 PN2222A LCD module in VHDL rtc 294 regulator power supply
Contextual Info: Application Note AC271 Real-Time Calendar Applications in Actel Fusion Devices Introduction The Actel Fusion Programmable System Chip is the world's first mixed-signal FPGA, integrating configurable analog, a real-time counter RTC , Flash memory blocks, and clock generation circuits—all in

Contextual Info: " 2225-K Martin Avenue, Santa Clara, CA 95050 FAX 1 COM PONENTS 408 492-1400 (408) 492-1500 Outline Drawings ) AC272 Low Noise Figure . High Output Level .

Contextual Info: AC273, 74ACT273 Octal D-Type Flip-Flop Features General Description • Ideal buffer for microprocessor or memory The AC273 and ACT273 have eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The common buffered Clock CP and Master

AC2092

Abstract: AC2091 M1-0412ME M1-0420ME UTO507 TL9014 M1_0412ME AC545 GPD462 AVANTEK utc5
Contextual Info: Teledyne / Cougar Cross Reference List Cougar SPECTRUM MICROWAVE Cougar SPECTRUM MICROWAVE Cougar SPECTRUM MICROWAVE AC105 ACH107 AP148 AC251 AC262 AC263 AC271 AC272 AC273 AC281 AC282 AC293 AP294 AC305 AC345 AC347 AP348 AR356 AC378 AC379 AC380 AC381 AC382

AC270

Abstract: pll02 ACTEL FUSION AFS1500 verilog code for slave SPI with FPGA
Contextual Info: Application Note AC270 SPI Flash Emulation for Fusion Devices Design Example Contents General Description . . Functional Description Interface Details . . . . Utilization Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CG624

Abstract: SK-AX1-AX2-KITTOP AX1000-CG624 RTAX2000 RTAX1000SL-CG624 CCGA AX2000-CG624 FG484 SK-AX2-CG624-KITBTM RTAX2000S
Contextual Info: Application Note AC275 CCGA to FBGA Adapter Sockets Introduction Actel recently introduced RTAX-S/L, the next generation designed-for-space antifuse Field Programmable Gate Arrays FPGAs . RTAX-S/L, with up to four million system gates, is Actel's highest density family,

74AC273

Abstract: 74AC273MTC 74AC273PC 74AC273SC 74AC273SJ 74ACT273 74ACT273SC 74ACT273SJ AC273 ACT273
Contextual Info: Revised March 2005 AC273 • 74ACT273 Octal D-Type Flip-Flop General Description Features The AC273 and ACT273 have eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input

AC272

Abstract: AS272
Contextual Info: 2/99 10 TO 250 MHz TO-8 CASCADABLE AMPLIFIER AC272 AC272 Typical Values Low Noise Figure . . . . . . . . High Output Level . . . . . . . . High Third Order I.P. . . . . . . High Efficiency . . . . . . . . . . High Performance Thin Film Standard Size TO-8 .

ACT273

Contextual Info: AC273 • ACT273 54AC/AC273 • 54ACT/74ACT273 Octal D Flip-Flop Description Connection Diagrams The ’AC/’ACT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) inputs load and reset (clear) all flip-flops

Contextual Info: 2/99 AC271 AC273 10 TO 250 MHz TO-8 CASCADABLE AMPLIFIERS AC271 AC273 Low Noise Figure . . . . . . . . . . . . . . . . . . . . . . . . 1.5 dB Medium Output Level. . . . . . . . . . . . . . . . . . . . . +14.0 dBm High Third Order I.P. . . . . . . . . . . . . . . . . . . . . . +30.0 dBm

touchscreen

Contextual Info: Application Note AC279 Interfacing an Actel Fusion Programmable System Chip to a Four-Wire Resistive Touchscreen The Actel Fusion FPGA is well suited for controlling liquid crystal displays and interfacing to resistive touchscreen panels. As the world's first mixed signal FPGA, Fusion seamlessly integrates digital FPGA logic,

AC272

Contextual Info: Rev. 5/10 10 TO 250 MHz TO-8 CASCADABLE AMPLIFIER AC272 AC272 Typical Values Low Noise Figure . . . . . . . . . . . . . . . . . . . . . . . . . . High Output Level . . . . . . . . . . . . . . . . . . . . . . . . . High Third Order I.P. . . . . . . . . . . . . . . . . . . . . . . . .

Contextual Info: 2/99 AC271 AC273 10 TO 250 MHz TO-8 CASCADABLE AMPLIFIERS AC271 AC273 Low Noise Figure. . . . . . . . . . . . . . . . . . . . . . . 1.5 dB Medium Output Level. . . . . . . . . . . . . . . . . . . . +14.0 dBm High Third Order I.P. . . . . . . . . . . . . . . . . . . . . +30.0 dBm

Contextual Info: 6/92 _ Kln , j O aU B H R ' C O M 2225-K Martin Avenue, Santa Clara, CA 95050 FAX P O N E N T S 408 492-1400 (408)492-1500 M fG Ê T ll 10 to 250 MHz  G 2 7 ÎJ TO-8 Cascadable Amplifiers AC271 AC273 Low Noise Figure .

Contextual Info: AC273 Octal D-Type Flip-Flop General Description The AC273 has eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The common buff­ ered Clock CP and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously.

Contextual Info: Application Note AC275 CCGA to FBGA Adapter Sockets Table of Contents Introduction . . . . . . . . . . . . . . . . . . . . . . The CCGA to FBGA Adapter Socket . . . . . . . . . CCGA to FBGA Ceramic Adapter Configurations . . . Assembly Procedure. . . . . . . . . . . . . . . . . .

LVCMOS15

Abstract: LVCMOS25 LVCMOS33 AC277
Contextual Info: Application Note AC277 Using Global Resources in Actel Fusion Devices Introduction Actel Fusion FPGA devices offer a powerful, low-delay global network scheme and have extensive support for multiple clock domains. In addition to the clock conditioning circuits CCCs and phase-locked

triggering with microprocessor

Abstract: AC272 AHB to APB
Contextual Info: Application Note AC272 CoreAI and SmartGen Implementation in Fusion Introduction The Actel FusionTM device is the world's first mixed-signal FPGA. As the ultimate Programmable System Chip PSC , Fusion integrates a configurable Analog Block (AB), Flash memory, and FPGA fabric in a

AC273

Abstract: 74AC273 74AC273MTC 74AC273PC 74AC273SC 74AC273SJ M20D MTC20
Contextual Info: Revised December 1998 AC273 Octal D-Type Flip-Flop General Description The AC273 has eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously.

74AC273

Abstract: 74AC273MTC 74AC273PC 74AC273SC 74AC273SJ 74ACT273 74ACT273SC 74ACT273SJ AC273 ACT273
Contextual Info: AC273, 74ACT273 Octal D-Type Flip-Flop Features General Description • Ideal buffer for microprocessor or memory The AC273 and ACT273 have eight edge-triggered D-type flip-flops with individual D-type inputs and Q outputs. The common buffered Clock CP and Master

Contextual Info: 2/99 AC272 10 TO 250 MHz TO-8 CASCADABLE AMPLIFIER AC272 Typical Values Low Noise Figure. . . . . . . . . . . . . . . . . . . . . . . . . . High Output Level . . . . . . . . . . . . . . . . . . . . . . . . . High Third Order I.P. . . . . . . . . . . . . . . . . . . . . . . .

Contextual Info: 2/99 AC271 AC273 10 TO 250 MHz TO-8 CASCADABLE AMPLIFIERS AC271 AC273 Low Noise Figure . . . . . . . . . . . . . . . . . . . . . . . . 1.5 dB Medium Output Level. . . . . . . . . . . . . . . . . . . . . +14.0 dBm High Third Order I.P. . . . . . . . . . . . . . . . . . . . . . +30.0 dBm

Contextual Info: 2/99 AC272 10 TO 250 MHz TO-8 CASCADABLE AMPLIFIER AC272 Typical Values Low Noise Figure. . . . . . . . . . . . . . . . . . . . . . . . . . High Output Level . . . . . . . . . . . . . . . . . . . . . . . . . High Third Order I.P. . . . . . . . . . . . . . . . . . . . . . . .