74LV20 Search Results

74LV20

Abstract: 74LV20PW
Contextual Info: Philips Semiconductors Product specification Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optim ized for Low Voltage applications: 1.0 to 3.6V The 74LV20 is a low -voltage S i-g a te CMOS device and is pin and function com patible with 74HC/HCT20.

74LV20

Abstract: 74LV20PW
Contextual Info: Philips Semiconductors Product specification Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optim ized for Low Voltage applications: 1.0 to 3.6V The 74LV20 is a low -voltage S i-g a te CMOS device and is pin and function com patible with 74HC/HCT20.

74LV20

Abstract: 74LV20D
Contextual Info: INTEGRATED CIRCUITS 74LV20 Dual 4-input NAND gate Product data Supersedes data of 1998 Apr 20 Philips Semiconductors 2003 Mar 10 Philips Semiconductors Product data Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0 V to 3.6 V

Contextual Info: IN TEG R ATE D C IR C U ITS 74LV20 Dual 4-input NAND gate Product specification 1997 Apr 07 IC24 Data Handbook Philips Semiconductors PHILIPS PHILIPS Philips Semiconductors Product specification Dual 4 - in p u t NAN D gate 74LV20 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0 to 3.6V

74LV20

Abstract: 74LV20D 74LV20DB 74LV20N 74LV20PW
Contextual Info: Product Specification Philips Semiconductors 74LV20 Dual 4-input NAND gate QUICK REFERENCE DATA FEATURES • • • • • • Optimized for Low Voltage applications: 1.0 to 3.6 V Accepts TTL input levels between Vcc = 2.7 V and Vcc = 3.6 V Typical V0LP output ground

Contextual Info: INTEGRATED CIRCUITS [M m S P IE 74LV20 Dual 4-input NAND gate Product specification Supersedes data of 1997 Mar 28 IC24 Data Handbook Philips Semiconductors 1998 Apr 20 PHILIPS Philips Semiconductors Product specification Dual 4-input NAND gate 74LV20 FEATURES

74LV20

Abstract: 74LV20PW MS-012AB
Contextual Info: Philips Semiconductors Product specification Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optim ized for Low Voltage applications: 1.0 to 3.6V The 74LV20 is a low -voltage S i-g a te CMOS device and is pin and function com patible with 74HC/HCT20.

74LV20

Abstract: 74LV20PW
Contextual Info: Philips Sem iconductors Product specification Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optim ized for Low Voltage applications: 1.0 to 3.6V The 74LV20 is a low -voltage S i-g a te CMOS device and is pin and function com patible with 74HC/HCT20.

74LV20

Abstract: 74LV20D 74LV20DB 74LV20N 74LV20PW 4-input nand gate cmos sot108a sot337
Contextual Info: Philips Semiconductors Preliminary Specification Dual 4-input NAND gate FEATURES 74LV20 QUICK REFERENCE DATA GND = 0 V; = 25°C; t, = t, < 2.5 ns • Optimized fo r Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between Vcc = 2.7 V and

Contextual Info: INTEGRATED CIRCUITS 74LV20 Dual 4-input NAND gate Product data Supersedes data of 1998 Apr 20 Philips Semiconductors 2003 Mar 10 Philips Semiconductors Product data Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0 V to 3.6 V

Contextual Info: Philip s Sem iconductors Product specification Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0 to 3.6V The 74LV20 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT20. • Accepts TTL input levels between V cc = 2-7V and Vcc = 3.6V

74LV20

Abstract: 74LV20PW
Contextual Info: INTEGRATED CIRCUITS 74LV20 Dual 4-input NAND gate Product specification Supersedes data of 1997 Mar 28 IC24 Data Handbook Philips Semiconductors 1998 Apr 20 Philips Semiconductors Product specification Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0 to 3.6V

Contextual Info: INTEGRATED CIRCUITS 74LV20 Dual 4-input NAND gate Product specification Supersedes data of 1996 Feb IC24 Data Handbook Philips Semiconductors 1996 Mar 28 Philips Semiconductors Product specification Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0 to 3.6V

Contextual Info: SN54LV20A, 74LV20A DUAL 4-INPUT POSITIVE-NAND GATE SCES339B – SEPTEMBER 2000 – REVISED DECEMBER 2000 D D D D SN54LV20A . . . J OR W PACKAGE 74LV20A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)

5555 FAIRCHILD optocoupler

Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
Contextual Info: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference

octal Bilateral Switches

Abstract: 74LVC162244A 74LV74 74LVC377
Contextual Info: Philips Semiconductors Advanced Low Voltage CMOS FUNCTION SELECTION GUIDE FUNCTION SELECTION GUIDE LV FAMILY GATES INVERTERS NAND AND NOR FUNCTION DEVICE NUMBER Hex Inverter 74LV04 Hex Inverter unbuffered 74LVUÛ4 Hex Inverter (Schmitt-Trigger) 74LV14 Quad 2-input

74LVC162244A

Abstract: SCHMITT-TRIGGER 3 state 5v tolerant HEX SCHMITT-TRIGGER INVERTER SPICE 74LV74 74LVC377
Contextual Info: Philips Semiconductors Functional Index IC24: ADVANCED LOW VOLTAGE CMOS LOGIC Preface .

A115-A

Abstract: C101 SN54LV20A SN74LV20A
Contextual Info: SN54LV20A, 74LV20A DUAL 4-INPUT POSITIVE-NAND GATE SCES339C – SEPTEMBER 2000 – REVISED JULY 2003 D D D D SN54LV20A . . . J OR W PACKAGE 74LV20A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Max tpd of 6 ns at 5 V Typical VOLP (Output Ground Bounce)

A115-A

Abstract: C101 SN54LV20A SN74LV20A
Contextual Info: SN54LV20A, 74LV20A DUAL 4ĆINPUT POSITIVEĆNAND GATE SCES339E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

A115-A

Abstract: C101 SN54LV20A SN74LV20A
Contextual Info: SN54LV20A, 74LV20A DUAL 4ĆINPUT POSITIVEĆNAND GATE SCES339E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

A115-A

Abstract: C101 SN54LV20A SN74LV20A
Contextual Info: SN54LV20A, 74LV20A DUAL 4-INPUT POSITIVE-NAND GATE SCES339B – SEPTEMBER 2000 – REVISED DECEMBER 2000 D D D D SN54LV20A . . . J OR W PACKAGE 74LV20A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)

A115-A

Abstract: C101 SN54LV20A SN74LV20A
Contextual Info: SN54LV20A, 74LV20A DUAL 4ĆINPUT POSITIVEĆNAND GATE SCES339E − SEPTEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

OF4455

Abstract: OT239 philips AS2000P triac ot239 phx4nq60e of4453 TDA8855H OF4455 diode OF4453 diode AS2000P
Contextual Info: Philips Semiconductors Product Discontinuation Notice DN53 Exhibit A June 30, 2004 SEE DN53 NOTICE LETTER FOR APPLICABLE LAST TIME BUY TERMS, CONDITIONS AND CODE DEFINITIONS FOR THESE DISCONTINUED PRODUCTS. REFER TO PHILIPS WEB-SITE "http://www.semiconductors.philips.com/eol FOR ADDED INFORMATION.

BUK2114

Abstract: BUK2114-50SYTS saa7117 SAA7136E MPSA92 168 saa7136 buk2914-50syts TDA8920BTH bu4508dx KMZ52
Contextual Info: Index Type number Page number 1N4148 34 1N4531 34 1N47xxA series 44 1PS10SB62 32 1PS10SB63 32 1PS10SB82 32 1PS181 36 1PS184 36 1PS193 34 1PS226 36 1PS59SB10 28 1PS59SB14 28 1PS59SB15 28 1PS59SB16 28 1PS59SB20 30 1PS59SB21 28 1PS66SB17 32 1PS66SB62 32 1PS66SB63