74LV20N Search Results

74LV20N Datasheets (7)

Part	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
74LV20N	Philips Semiconductors	Dual 4-input NAND gate	Original	PDF	112.95KB	12
74LV20N	Unknown	Historical semiconductor price guide (US$ - 1998). From our catalog scanning project.	Historical	PDF	30.5KB	1
74LV20N	Philips Semiconductors	Dual 4-input NAND gate	Scan	PDF	205.97KB	9
74LV20N	Philips Semiconductors	Dual 4-input NAND gate	Scan	PDF	209.86KB	10
74LV20N	Philips Semiconductors	Dual 4-input NAND gate	Scan	PDF	207.24KB	9
74LV20N	Philips Semiconductors	Dual 4-input NAND gate	Scan	PDF	92.01KB	3
74LV20N	Philips Semiconductors	Dual 4-input NAND gate	Scan	PDF	64.77KB	2

74LV20N Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
74LV20 Abstract: 74LV20D 74LV20DB 74LV20N 74LV20PW Contextual Info: Product Specification Philips Semiconductors 74LV20 Dual 4-input NAND gate QUICK REFERENCE DATA FEATURES • • • • • • Optimized for Low Voltage applications: 1.0 to 3.6 V Accepts TTL input levels between Vcc = 2.7 V and Vcc = 3.6 V Typical V0LP output ground	OCR Scan	74LV20 74LV20 74HC/HCT20. 711002b 74LV20D 74LV20DB 74LV20N 74LV20PW	PDF
74LV20 Abstract: 74LV20D 74LV20DB 74LV20N 74LV20PW 4-input nand gate cmos sot108a sot337 Contextual Info: Philips Semiconductors Preliminary Specification Dual 4-input NAND gate FEATURES 74LV20 QUICK REFERENCE DATA GND = 0 V; = 25°C; t, = t, < 2.5 ns • Optimized fo r Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between Vcc = 2.7 V and	OCR Scan	74LV20 74LV20 74HC/HCT20. 7110flEb 33vcc 71106EL 74LV20D 74LV20DB 74LV20N 74LV20PW 4-input nand gate cmos sot108a sot337	PDF
Contextual Info: Philip s Sem iconductors Product specification Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0 to 3.6V The 74LV20 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT20. • Accepts TTL input levels between V cc = 2-7V and Vcc = 3.6V	OCR Scan	74LV20 --25cC 74LV20 74HC/HCT20.	PDF

Catalog Datasheet

Type

Document Tags

PDF

74LV20

Abstract: 74LV20D 74LV20DB 74LV20N 74LV20PW
Contextual Info: Product Specification Philips Semiconductors 74LV20 Dual 4-input NAND gate QUICK REFERENCE DATA FEATURES • • • • • • Optimized for Low Voltage applications: 1.0 to 3.6 V Accepts TTL input levels between Vcc = 2.7 V and Vcc = 3.6 V Typical V0LP output ground

OCR Scan

74LV20 74LV20 74HC/HCT20. 711002b 74LV20D 74LV20DB 74LV20N 74LV20PW

PDF

74LV20

Abstract: 74LV20D 74LV20DB 74LV20N 74LV20PW 4-input nand gate cmos sot108a sot337
Contextual Info: Philips Semiconductors Preliminary Specification Dual 4-input NAND gate FEATURES 74LV20 QUICK REFERENCE DATA GND = 0 V; = 25°C; t, = t, < 2.5 ns • Optimized fo r Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between Vcc = 2.7 V and

OCR Scan

74LV20 74LV20 74HC/HCT20. 7110flEb 33vcc 71106EL 74LV20D 74LV20DB 74LV20N 74LV20PW 4-input nand gate cmos sot108a sot337

PDF

Contextual Info: Philip s Sem iconductors Product specification Dual 4-input NAND gate 74LV20 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0 to 3.6V The 74LV20 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT20. • Accepts TTL input levels between V cc = 2-7V and Vcc = 3.6V

OCR Scan

74LV20 --25cC 74LV20 74HC/HCT20.

PDF