SOT108A Search Results

Contextual Info: 74HC/HCT125 MSI QUAD BUFFER/LINE DRIVER; 3-STATE FEATURES • • TYPICAL Output capability: bus driver ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT125 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky T TL LSTTL . They are specified in

74LVC74 TSSOP14

Abstract: 74LVC74 74LVC74D 74LVC74DB 74LVC74PW
Contextual Info: Philips Semiconductors Product Specification Dual D-type flip-flop with set and reset; positive-edge trigger FEATURES • • • • • • Wide supply voltage range of 1.2 V to 3.6 V In accordance with JEDEC standard no. 8-1A. Inputs accept voltages upto

74HC-HCT126

Abstract: 74HC 74HCT
Contextual Info: 74HC/HCT126 MSI QUAD BUFFER/LINE DRIVER;3-STATE FEATURES TYPICAL • * Output capability: bus driver >CC category: MSI GENERAL DESCRIPTION The 74HC/HCT126 are high-speed Si-gate CMOS devices and are pin compatible w ith low power Schottky T T L LS TT U . They are specified in

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Abstract: 74LVC02 74LVC02D 74LVC02DB 74LVC02 Philips
Contextual Info: N A P C /P H I L IP S SEMICOND Philips Semiconductors b3E D • 0 0 ß 3 6 7 3 BIß « S I C 3 Objective Specification 4^53^24 Quad 2-input NOR gate QUICK REFERENCE DATA GND = 0 V; T ^ = 25°C; t, = t, < 2.5 ns FEATURES • • • • • 74LVC02 Wide supply voltage range of

74LV393D

Abstract: 74LV393PW 74LV393 74LV393DB 74LV393N logic diagram of 4bit binary ripple up counter
Contextual Info: Philips Sem iconductors Product Specification Dual 4-bit binary ripple counter FEATURES • Optimized for Low Voltage applications: 1.0 to 3.6 V • Accepts TTL Input levels between Vcc = 2.7 V and Vcc = 3.6 V • Typical V0LP output ground bounce < 0.8 V at Vcc = 3.3 V,

74LV138

Abstract: 74LV138D 74LV138DB 74LV138N 74LV138PW
Contextual Info: Philips Semiconductors Product Specification 3-to-8 line decoder/demultipiexer; inverting FEATURES • Optimized for Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between Vcc = 2.7 V and Vcc = 3.6 V • Typical VOLP output ground bounce < 0.8 V at Vcc = 3.3 V,

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Abstract: 74LVC00 74LVC00D 74LVC00DB 74LVC00PW
Contextual Info: Philips Semiconductors Product Specification Quad 2-input NAND gate FEATURES • • • • • 74LVC00 QUICK REFERENCE DATA GND = 0 V; T ^ , = 25°C; t, = t, < 2.5 ns W ide supply voltage range of 1.2 V to 3.6 V In accordance with JEDEC standard no. 8-1 A.

74LV04

Abstract: 74LV04D 74LV04DB 74LV04N 74LV04PW SWCC
Contextual Info: Philips Semiconductors Product Specification Hex inverter 74LV04 FEATURES • • • • • Optimized fo r Low Voltage applications: 1.0 to 3.6 V Accepts TTL input levels between Vcc = 2.7 V and Vcc = 3.6 V Typical V0LP output ground bounce < 0.8 V at Vcc = 3.3 V,

HCT86

Abstract: 74HC 74HCT 74HC-HCT86
Contextual Info: 74HC/HCT86 SSI Q UAD 2-INPUT E X C L U S IV E -O R GATE FEATURES * • TYPICAL Output capability: standard lc c category: SSI GENERAL DESCRIPTION The 74HC/HCT86 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky T T L LSTTL . They

1990- 2335 optocoupler

Abstract: philips 3139 147 tv tuner TDA6101Q equivalent TDA3827 tda6100 ofw g 3201 ica v94 display OFW G 3352 BB515 pj 2309 smd diode
Contextual Info: Philips S em iconductors S em ico n d u cto rs fo r Television and V id eo S ystem s Contents PART A page SELECTION GUIDE Functional index 5 Numerical index 17 Maintainance list 27 GENERAL Quality 31 Pro Electron type numbering system for Discrete Semiconductors

HEF4016BP

Contextual Info: HEF4016B gates QUADRUPLE BILATERAL SWITCHES The H EF4 0 1 6 B has four independent analogue switches transmission gates . Each switch has two input/ output terminals (Y/Z) and an active H IG H enable input (E ). When E is connected to V q q a low impedance bidirectional path between Y and Z is established (ON condition). When E is connected to

Contextual Info: 74HC/HCT164 MSI 8-BIT SERIAL-IN/PARALLEL-OUT SHIFT REGISTER FEATURES TY P IC A L SY M B O L * G ated serial d a ta inputs * A s ynchronous m aster reset • O u tp u t c a p a b ility : standard • I q q category: M S I The 74H C /H C T 164 are 8-bit edgetriggered shift registers with serial data

74HC7014

Contextual Info: Philips Semiconductors Product Specification Hex non-inverting precision Schmitt-trigger_ 74HC7014 QUICK REFERENCE DATA GND = 0 V; Ta^b = 25 °C; t, = t, = 6 ns FEATURES • • • Operating voltage 3 to 6 V Output capability: standard category: SSI

74HC

Abstract: 74HC58
Contextual Info: 74HC58 SSI D U A L A N D -O R G A T E FEA TU R ES T Y P IC A L • Output capability: standard • Iq q category: SSI SYM BOL G E N E R A L D ESCRIPTIO N tPHL/ iPLH propagation delay 1n to 1Y 2n to 2 Y C| input capacitance CpD power dissipation capacitance per gate

74LV138

Abstract: 74LV138D 74LV138DB 74LV138N 74LV138PW
Contextual Info: Philips Semiconductors Product Specification 3-to-8 line decoder/demultiplexer; inverting FEATURES 74LV138 QUICK REFERENCE DATA GND = 0 V; Tam0 = 25°C; t, = t, < 2.5 ns • Optimized for Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels

74HCT logic family specifications

Abstract: 74HC 74HCT 74HCT Characteristics Philips 74HCT package HCT32
Contextual Info: 74HC/HCT32 SSI Q UAD 2-INPUT OR GATE FEATURES T Y P IC A L • Output capability: standard • SYM BOL P A R A M E TE R U N IT C O N D ITIO N S I q q category: SSI GENERAL DESCRIPTION The 74H C /H C T 32 are high speed Si-gate CMOS devices and are pin com patible w ith lo w power S ch o ttk y

74HC/HCT125

Abstract: 74LV1250 2ace 74LV125 74LV125D 74LV125DB 74LV125N 74LV125PW VHLP
Contextual Info: Philips Semiconductors Product Specification Quad buffer/line driver; 3-state FEATURES QUICK REFERENCE DATA GND = 0 V; T ^ = 25°C; t, = t, < 2.5 ns • Optimized for Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between Vcc = 2.7 V and

74LVC74 TSSOP14

Abstract: 74LVC74D 74LVC74 74LVC74DB 74LVC74PW
Contextual Info: Philips Semiconductors Objective Specification Dual D-type flip-flop with set and reset; positive-edge trigger FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • In accordance with JEDEC standard no. 8-1 A. • Inputs accept voltages upto 5.5 V • CMOS low power consum ption

lv14

Abstract: 74lv140 74LV14 74LV14DB 74LV14N 74LV14D 74LV14PW philips pit
Contextual Info: Philips Semiconductors Product Specification Hex inverting Schmitt-trigger FEATURES • • • • Optimized fo r Low Voltage applications: 1.0 to 3.6 V Accepts TTL input levels between Vcc = 2.7 V and Vcc = 3.6 V Typical VOLP output ground bounce < 0.8 V at Vcc = 3.3 V,

TCA220

Abstract: TCA770D lg washing machine circuit diagram TCA770A SAA1114 SAK150BT TCA410A tda1540 TEA1016 tba915
Contextual Info: F U N C T IO N A L A N D N U M E R IC A L IN D EX M A IN T E N A N C E T Y P E L IS T INDEX 7 V SELECTION GUIDE BY FUNCTION type number page function OPERATIONAL AMPLIFIERS TCA220 TCA520B; D TEA1016 35 41 47 triple operational amplifier operational amplifier

HEF4013BP

Abstract: HEF4013 HEF4013BT hef4013b HEF4013BD 7Z69524
Contextual Info: H EF4013B flip-flops DUAL D -TY P E FLIP-FLOP The HEF4013B is a dual D-type flip -flo p which features independent set direct S q , clear direct (C q ), clock inputs (CP) and outputs (0,C5). Data is accepted when CP is LOW and transferred to the ou tput on

74LVC02

Abstract: 74LVC02D 74LVC02DB 74LVC02PW
Contextual Info: Philips Semiconductors Product Specification Quad 2-input NOR gate QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns FEATURES • • • • • 74LVC02 Wide supply voltage range of 1.2 V to 3.6 V In accordance with JEDEC standard no. 8-1A.

PC74HCU04P

Abstract: PC74HCU04T 14 HCU04 74HCU PC74HCU04 APPLICATIONS OF astable multivibrator power inverter schematic diagram 74HCU04 HCU04 VQC10
Contextual Info: PC74HCU04 H E X IN V E R T E R FEATURES • * Output capability: standard <CC category: SSI SYMBOL PARAMETER CONDITIONS tP H L/ tPLH propagation delay nA to nY CL = 15 pF V CC = 5 V C| input capacitance CpD power dissipation capacitance per inverter GENERAL DESCRIPTION

HCT132

Contextual Info: 74HC/HCT132 SSI QUAD 2-INPUT NAND SCHMITT TRIGGER FEATURES • • Output capability: standard Ic e category: SSI GENERAL DESCRIPTION The 74H C /H C T 132 are high-speed Si-gate CMOS devices and are pin com patible w ith lo w pow er S c h o ttk y T T L L S T T L . The y are specified in