74LV02 Search Results

Contextual Info: INTEGRATED CIRCUITS 74LV02 Quad 2-input NOR gate Product specification Supersedes data of 1997 Feb 03 IC24 Data Handbook Philips Semiconductors 1998 Apr 20 PHILIPS Philips Semiconductors Product specification Quad 2-input NOR gate 74LV02 FEATURES DESCRIPTION

74LV02

Abstract: 74LV02D 74LV02N
Contextual Info: Philips Semiconductors bbS3TE4 D0Û3732 ft 14 M S I C B Quad 2-input NOR gate • • • • • se m ic o n d t»3E d 74LV02 QUICK REFERENCE DATA GND = 0 V ; T ^ = 25°C; t, = t, < 2.5 ns FEATURES • n a p c /p h ilip s Product Specification Optimized for Low Voltage

Contextual Info: INTEGRATED CIRCUITS 74LV02 Quad 2-input NOR gate Product data Supersedes data of 1998 Apr 20 Philips Semiconductors 2003 Mar 03 Philips Semiconductors Product data Quad 2-input NOR gate 74LV02 FEATURES DESCRIPTION • Wide operating voltage: 1.0 to 5.5 V • Optimized for low voltage applications: 1.0 to 5.5 V

74LV02

Abstract: 74LV02PW
Contextual Info: INTEGRATED CIRCUITS 74LV02 Quad 2-input NOR gate Product specification IC24 Data Handbook Philips Semiconductors 1997 Feb 03 Philips Semiconductors Product specification Quad 2-input NOR gate 74LV02 FEATURES DESCRIPTION • Wide operating voltage: 1.0 to 5.5 V

74LV02

Abstract: 74LV02D
Contextual Info: INTEGRATED CIRCUITS 74LV02 Quad 2-input NOR gate Product data Supersedes data of 1998 Apr 20 Philips Semiconductors 2003 Mar 03 Philips Semiconductors Product data Quad 2-input NOR gate 74LV02 FEATURES DESCRIPTION • Wide operating voltage: 1.0 to 5.5 V • Optimized for low voltage applications: 1.0 to 5.5 V

813A

Abstract: 74LV02 74LV02D 74LV02DB 74LV02N 74LV02PW
Contextual Info: Philips Semiconductors Product Specification Quad 2-input NOR gate FEATURES • • • • • • 74LV02 QUICK REFERENCE DATA Optimized for Low Voltage applications: 1.0 to 3.6 V Accepts TTL input levels between Vcc = 2.7 V and Vcc = 3.6 V Typical V0LP output ground

74LV02

Abstract: 74LV02D 74LV02DB 74LV02N 74LV02PW
Contextual Info: Philips Semiconductors Product Specification Quad 2-input NOR gate FEATURES • • • • • • 74LV02 QUICK REFERENCE DATA GND = 0 V; T .^ = 25°C; tr = t, < 2.5 ns Optimized for Low Voltage applications: 1.0 to 3.6 V Accepts TTL input levels between VM = 2.7 V and

74LV02

Abstract: 74LV02PW
Contextual Info: Philips Semiconductors Product specification Quad 2-input NOR gate 74LV02 FEATURES DESCRIPTION • W id e o p e ra tin g v o lta g e : 1.0 to 5.5 V T h e 7 4 LV 02 is a lo w -v o lta g e S i-g a te C M O S d e v ic e th a t is pin an d fu n ctio n c o m p a tib le w ith 7 4 H C /H C T 0 2 .

74HC-HCT02

Abstract: 74LV02 74LV02PW
Contextual Info: Philips Semiconductors Product specification Quad 2-input NOR gate 74LV02 FEATURES DESCRIPTION • W id e o p e ra tin g v o lta g e : 1.0 to 5.5 V T h e 7 4 LV 02 is a lo w -v o lta g e S i-g a te C M O S d e v ic e th a t is pin an d fu n ctio n c o m p a tib le w ith 7 4 H C /H C T 0 2 .

Contextual Info: Philips Semiconductors Product specification Quad 2-input NOR gate 74LV02 FEATURES DESCRIPTION • Wide operating voltage: 1.0 to 5.5 V The 74LV02 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT02. • Optimized for low voltage applications: 1.0 to 5.5 V

74HC02

Abstract: 74HCT02 74LV02 74LV02BQ 74LV02D 74LV02PW JESD22-A114E TSSOP14 DHVQFN14
Contextual Info: 74LV02 Quad 2-input NOR gate Rev. 04 — 20 December 2007 Product data sheet 1. General description The 74LV02 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC02 and 74HCT02. The 74LV02 provides a quad 2-input NOR function.

74HC-HCT02

Abstract: 74LV02 74LV02PW
Contextual Info: INTEGRATED CIRCUITS 74LV02 Quad 2-input NOR gate Product specification Supersedes data of 1997 Feb 03 IC24 Data Handbook Philips Semiconductors 1998 Apr 20 Philips Semiconductors Product specification Quad 2-input NOR gate 74LV02 FEATURES DESCRIPTION • Wide operating voltage: 1.0 to 5.5 V

74LV02

Abstract: T714 74LV02D 74LV02DB 74LV02N 74LV02PW D10G21
Contextual Info: Product Specification Philips Semiconductors 74LV02 Quad 2-input NOR gate FEATURES • • • • • • • Wide operating voltage: 1.0 to 5.5 V Optimized for Low Voltage applications: 1.0 to 3.6 V Accepts TTL input levels between Vcc = 2.7 V and Vcc = 3.6 V

Contextual Info: SN54LV02A, 74LV02A QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES SCLS390J − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce 13 3 12 4 11 5 10 6 9 7 8 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC

5555 FAIRCHILD optocoupler

Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
Contextual Info: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference

LV02A

Abstract: A115-A C101 SN54LV02A SN74LV02A
Contextual Info: SN54LV02A, 74LV02A QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES SCLS390J − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce 13 3 12 4 11 5 10 6 9 7 8 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC

Contextual Info: SN54LV02A, 74LV02A QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES SCLS390J − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce 13 3 12 4 11 5 10 6 9 7 8 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC

A115-A

Abstract: C101 LV02A SN54LV02A SN74LV02A
Contextual Info: SN54LV02A, 74LV02A QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES SCLS390J − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce 13 3 12 4 11 5 10 6 9 7 8 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC

lv02a

Abstract: A115-A C101 SN54LV02A SN74LV02A
Contextual Info: SN54LV02A, 74LV02A QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES SCLS390J − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce 13 3 12 4 11 5 10 6 9 7 8 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC

texas instruments package marking

Abstract: lv02a LV273A lv132a 74LV273A 74lv540a 74LV175A LV05A SN74LV02ANSR SN74LV05ANS
Contextual Info: TEXAS INSTRUMENTS Informational Notification for the Symbolization Change of Select Devices in ‘NS’ Package November 5, 1998 Abstract Texas Instruments Inc., Standard Linear and Logic products SLL is in the process of converting topside symbolization on a few select devices in the ‘NS’ package to show the ‘74’ prefix before the

ab-7 national

Abstract: 74LVQ245
Contextual Info: National LVQ245 & Semiconductor 74LVQ245 Low Voltage Octal Bidirectional Transceiver with TRI-STATE Outputs General Description Features The LVQ245 contains eight non-inverting bidirectional buff­ ers with TRI-STATE: outputs and is intended for bus-oriented applications. Current sinking capability is 12 mA at both

Contextual Info: SN54LV02A, 74LV02A QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES SCLS390J − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce 13 3 12 4 11 5 10 6 9 7 8 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC

Contextual Info: SN54LV02A, 74LV02A QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES SCLS390J − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce 13 3 12 4 11 5 10 6 9 7 8 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC

octal Bilateral Switches

Abstract: 74LVC162244A 74LV74 74LVC377
Contextual Info: Philips Semiconductors Advanced Low Voltage CMOS FUNCTION SELECTION GUIDE FUNCTION SELECTION GUIDE LV FAMILY GATES INVERTERS NAND AND NOR FUNCTION DEVICE NUMBER Hex Inverter 74LV04 Hex Inverter unbuffered 74LVUÛ4 Hex Inverter (Schmitt-Trigger) 74LV14 Quad 2-input