74LS02 Search Results

Contextual Info: SA NY O SEMICONDUCTOR 15E D I CORP 7 clci7G7b O O O S b O D LC74HC02 3003A *• v ’ ~ CM O S High-Speed Standard Logic LC74HC Series Quad 2-Input N O R Gate 16958 Features The LC74HC02 consists of 4 identical 2-input NOR gates. Uses CMOS silicon gate process technology to achieve operating speeds similar to LS-TTL 74LS02 with the

74LS02 truth table

Abstract: TTL 74ls02 74LS02 74LS02 TTL 751A-02 motorola 74LS02
Contextual Info: M MOTOROLA SN54/74LS02 QUAD 2-INPUT NOR GATE Q UAD 2-IN P U T NOR GATE vc c LOW POWER SCHOTTKY nu rii [ïïi M N m m -<SJ L<3L r?i r?i t J SUFFIX CERAMIC CASE 632-08 LU LU LU LU LU LiJ LzJ GND N SUFFIX „n p rïï csss, D SUFFIX S0IC * CASE 751A ORDERING INFORMATION

7402 pin configuration

Abstract: TTL 7402 7402 TTL specification of 74ls02 7402 nor 7402 signetics 7402 NOR gate 74LS02 pin configuration 7402 7402 quad 2 input not
Contextual Info: 7402, LS02, S02 Signetics Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V +5 % ; T a = 0°C to + 7 0 “C

7402 TTL

Abstract: 7402 TTL 7402 7402 pin configuration 74LS02 function table 74LS02 pin configuration 7402 signetics TTL specification of 74ls02 7402 nor 74S02
Contextual Info: Signetics I 7402, LS02, S02 Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPE TYPICAL SUPPLY CURRENT TOTAL TYPICAL PROPAGATION DELAY 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE VCc = 5V ±5% ; T a = 0°C to +70°C

TTL LS 7402

Abstract: 74LS02 pin configuration TTL 7402 7402 pin configuration 7402 TTL 7402 NOR gate 7402 74LS 7402
Contextual Info: Signetics I 7402, LS02, S02 Gates Quad Two-input NOR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE VCC = 5 V ± 5 % ; T A = 0°C to +70°C

IC 74LS02

Abstract: 74LS02 pinout 74LS02 7402pc 74LS02P 74S02PC
Contextual Info: NATIONAL SEflICOND { L O G I C } DEE D I bSGliea 00^3^3^ 1 I CO NN ECTIO N DIAGRAMS PINOUT A 54/7402 54S/74S02 54LS/74LS02 QUAD 2-INPUT NOR GATE ORDERING CODE: See S ection 9 PIN PKGS CO M M ERCIAL GRADE V cc = +5.0 V ±5%, = 0 °C to +70° C O UT Ta M ILITARY GRADE

Contextual Info: GD54/74LS02 QUADRUPLE 2-INPUT POSITIVE-NOR GATES Description Pin Configuration This device contains four independent 2-input NOR gates. It performs the Boolean functions Y = A B or Y = A + B in positive logic. VCc 4Y 4B 4A 3Y 3B 3A Function Table INPUTS OUTPUT

DN74LS02

Abstract: MA161 dn74LS02 PIN
Contextual Info: LS T T L DN74LS Series DN 74LS02 74LS02 DN 74- l S 0 2, Quad 2-input P o s itiv e NOR Gates • Description D N 7 4 L S 0 2 contains four 2-input positive isolation N O R gate circuits. ■ Features • L o w pow er consum ption P d = 1 lm W ty p ica l

74LS02

Abstract: TTL 74ls02 74LS02 truth table 74LS02 TTL truth table NOT gate 74 74LS02 datasheet 751A-02
Contextual Info: SN54/74LS02 QUAD 2-INPUT NOR GATE QUAD 2-INPUT NOR GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN

74LS02 truth table

Abstract: 74ls02r
Contextual Info: g M O TO R O LA SN54/74LS02 R R R R R R R L<ÿJ r9 n QUAD 2-INPUT NOR GATE ÜJ lI j LÌJ Lü ill Lü U LO W POWER SC HÛ TTKY J Suffix — Case 632-08 (Ceramic) N Suffix — Case 646*06 (Plastic) GUARAN TEED OPERATING RANGES SYM BO L PARAM ETER MIN TYP MAX

TTL 74ls02

Abstract: 74LS02 truth table 74LS02 74LS02 datasheet 74LS02 ttl 4 inputs OR gate truth table 751A-02 high voltage diodes SN54LSXXJ SN74LSXXN
Contextual Info: SN54/74LS02 QUAD 2-INPUT NOR GATE QUAD 2-INPUT NOR GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN

74LS02 gate diagram

Abstract: CI 74LS02 pin diagram of 74ls02 74LS02 IC TTL 74LS02 IC 74LS02 74LSTTL cmos 74ls02 74LS02 truth table 74LSTTL 5V
Contextual Info: SANYO SEMICONDUCTOR 12E CORP LC74HC02M 40 3034 A » 1 7 ci c1 7 0 7 t 1 Q Q 0 2 b 0 4 C M O S High-Speed Standard Logic L C 7 4 H C Series Quad 2-Input NOR Gate 2139A Features • The LC74HC02M consists of 4 identical 2-input NOR gates. • Uses CMOS silicon gate process technology to achieve operating speeds similar to LS-TTL 74LS02 with the

74LS02 gate diagram

Abstract: TTL 74ls02 74LS02 truth table IC TTL 74LS02 74LS02 pinout T43CA 74LS02 LC74HC02 LC74HC02M IC 74LS02
Contextual Info: SANYO SEMICONDUCTOR 12E CORP LC74HC02M 40 3034 A » 1 7 ci c1 7 0 7 t 1 Q Q 0 2 b 0 4 C M O S High-Speed Standard Logic L C 7 4 H C Series Quad 2-Input NOR Gate 2139A Features • The LC74HC02M consists of 4 identical 2-input NOR gates. • Uses CMOS silicon gate process technology to achieve operating speeds similar to LS-TTL 74LS02 with the

74LS183

Abstract: 74LS275 74LS97 74LS04 74LS00 74ls series 74LS356 74LS93 74LS396 74LS55
Contextual Info: CM O S/BiCM O S Gate Array • LZ93/LZ95/LZ96/LZ97 Series 74LS Series Macro Cell Libraries LZ93/LZ95/LZ96/LZ97 Series Model No. Model No. Model No. Model No. Model No. Model No. Model No. 74LS00 74LS51 74LS107 74LS158 74LS193 74LS261 74LS364 74LS02 74LS54

74LS02

Contextual Info: I LS TTL DN74LS Series 74LS02 74LS02 Quad 2 - input P ositive NOR Gates • Description P-1 DN 74LS02 contains four 2-input positive isolation NOR gate circuits. ■ Features • • • • Low pow er consum ption Pd = 1 lm W typical High speed ( t pd = 10ns typical)

54l02

Abstract: IC 74LS02
Contextual Info: TYPES SN5402, SN54L02, SN54LS02, SN54S02, SN7402, 74LS02, SN74S02 QUADRUPLE 2-INPUT POSITIVE-NOR GATES REVISED DECEMBER 1983 SN 5402, SN54L02 . . . J PACKAGE SN 54LS02, S N 54S 02 . . . J OR W PACKAGE SN 7402 . . . J OR N PACKAGE SN 74LS02, S N 74S 02 . . . D, J OR N PACKAGE

IC 7402

Abstract: IC TTL 7402 74LS02 gate diagram logic diagram of ic 7402 54LS02 TTL SN7402
Contextual Info: SN 5402, SN 54 LS0 2, SN 54S02, SN 7402, SN 74LS02, SN 74S02 QUADRUPLE 2-INPUT POSITIVE NOR GATES DECEMBER 1 9 8 3 -R E V IS E D MARC H 1 9 6 8 • Package Options Include Plastic "Sm all O utline” Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic

motorola 74LS02

Abstract: 74Ls02 TTL 74ls02 74LS02 truth table
Contextual Info: MOTOROLA SN54/74LS02 QUAD 2-INPUT NOR GATE Q UAD 2 -IN P U T NOR GATE Vcc fui R ; [ï ï i rm r a m LOW POWER SCHOTTKY rn -¿J UlL J SUFFIX CERAMIC CASE 632-08 r 9 i r ? i LU LU LU LU LU LU Ld GND ,FfPÏÏ cSSIS, N SUFFIX D SUFFIX SOIC CASE 751A-02 5 ORDERING INFORMATION

74LS02 pin configuration

Abstract: 74LS02 74LS02 function table pin configuration logic symbol 74LS02 pin configuration 74LS02 74ls gate symbols 54LS 74LS
Contextual Info: GD54/74LS02 QUADRUPLE 2-INPUT POSITIVE-NOR GATES Description Pin Configuration This device contains four independent 2-input NOR gates. It performs the Boolean functions Y = A B or Y = A + B in positive logic. 4Y 4B 4A n fi rn 3Y m 3B 3A m I« <£J LcSL Function Table

400EM

Abstract: 472EM cdb 400E CI 74151 CDB404E 4153E 7404 7408 7432 4121EM IC TTL 7460 446E
Contextual Info: JBIGITAl_ _ INTEGRATED IK* m m X.X.L. . L 5400 5402 5403 5404 5405 5406 5407 5408 5409 5410 5413 5416 5417 5420 5430 5432 5437 5438 5440 5442 5446 5447 5450 5451 5453 X . X ROWER 74LS00 74LS02 74LS03 74LS04 74LS05 74LS08 74LS09 74'^SIO 74LS11 •74LS12 74LS13

74LS02P

Contextual Info: MITSUBISHI LS TTLs M 74LS02P QUADRUPLE 2-IN P U T POSITIVE NOR GATES DESCRIPTION The M 74LS 02P is a semiconductor integrated PIN CONFIGURATION TOP VIEW circuit containing 4 dual-input positive N O R and negative N A N D gates. OUTPUT FEATURES 1 Y «—

lm294oct

Abstract: d71054c D71055C lm294oct-12 74c928 7486 XOR GATE interfacing ADC 0808 with 8086 microprocessor 555 7490 7447 7 segment LED display Motorola 74LS76 NEC D71055C
Contextual Info: Integrated Circuits 74LS Series Featuring better performance than standard 7400 series devices, the 74LS series also uses about 1/5th the power. Part# Pins Description 74LS00 74LS01 74LS02 74LS03 74LS04 74LS05 74LS06 74LS07 74LS08 74LS09 74LS10 74LS11 74LS12

74LS02 pin configuration

Abstract: 74LS02 function table
Contextual Info: GD54/74LS02 QUADRUPLE 2-INPUT POSITIVE-NOR GATES Description Pin Configuration This device contains four independent 2-input NOR gates. It performs the Boolean functions Y = A B or Y = A + B in positive logic. Vcc 4Y 4B 4A 3Y 3B 3A Function Table INPUTS A

7402 NOR gate ic pin configuration

Abstract: IC 7402 IC PIN CONFIGURATION OF 74LS02 7402 pin configuration 74LS02 pin configuration 74LS02 function table 7402 ic ttl 7402 7402 logic gate ic IC 74LS02
Contextual Info: Signetics I 7402, LS02, S02 Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE VCC = 5V±5%; Ta = 0°C to +70°C