4KX18 Search Results

AEB DP1

Contextual Info: QS88182 Q S88182 High-Speed CMOS Dual 4Kx18 Cache Tag SRAM Ô ADVANCE INFORMATION FEATURES/BENEFITS Dual 4Kx18 allows 2-way set associative cache tag MATCH lines per bank allow direct bank ÜE drive MATCH enable controls MATCH outputs for speed 20ns/25 ns/30 ns Taa Commercial

Contextual Info: QS88180, Q QS88160 High-Speed CMOS Dual 4Kx16/18 SRAM with Latched Addresses QS88180 QS88160 FEATURES/BENEFITS • • • • Dual 4Kx18/16 allows 2-way set associative cache Byte enables for byte/Word read/write 20ns/25 ns/30ns/35 ns Taa Available in 52-pin PLCC

AEB DP1

Abstract: power bank 5v associative cache match
Contextual Info: QS88182 Q S88182 High-Speed CMOS Dual 4Kx18 Cache Tag SRAM Q ADVANCE IN F O R M A T IO N F E A T U R E S /B E N E F IT S Dual 4Kx18 allows 2-way set associative cache tag MATCH lines per bank allow direct bank Ü E drive MATCH enable controls MATCH outputs for speed

AEB DP1

Abstract: 0588 82385 A12A D815
Contextual Info: Q S88180, Q QS88160 High-Speed CMOS Dual 4Kx16/18 SRAM with Latched Addresses QS88180 Q S 88160 Prelim inary FE A T U R E S /B E N E FIT S • • • • • Dual 4Kx18/16 allows 2-way set associative cache Byte enables for byte/word read/write 20ns/25 ns/30ns/35 ns Taa commercial

Contextual Info: M IC R O N * MT56C2818 8 K x 18, DUAL 4 K x 18 CACHE DATA SRAM CACHE DATA SRAM SINGLE 8Kx18 SRAM, DUAL 4KX18SRAM CONFIGURABLE CACHE DATA SRAM FEATURES PIN ASSIGNMENT Top View • A u tom atic W RITE cycle com pletion • O p erates a s tw o 4K x 18 SR A M s w ith com m on

Contextual Info: MT56C3818 8K x 18, DUAL 4K x 18 CACHE DATA SRAM M IC R O N CACHE DATA SRAM SINGLE 8Kx18 SRAM, DUAL 4KX18SRAM CONFIGURABLE CACHE DATA SRAM FEATURES • Operates as two 4K x 18 SRAMs with common addresses and data; also configurable as a single 8K x 18 SRAM

82385

Abstract: TW 8816 OS8818 8818 c5t transistor NX18 QS8816 DPO/DSA70000B
Contextual Info: QUALITY SEMICONDUCTOR INC. High-Speed CMOS Dual 4KX16/18 SRAM with Latched Addresses Q X16 SRAM QS8816/7 x18 SRAM ^ I h c e in f o r m a t i o n FEATURES/BENEFITS Dual 4Kx18 allows 2-way set associative cache Latched and unlatched A12 versions 20ns/25 ns/35 ns Taa, 8 ns Toe

Contextual Info: QS88180, ô QS88160 High-Speed CMOS Dual 4Kx16/18 SRAM with Latched Addresses QS88180 QS88160 Preliminary FEATURES/BENEFITS • • • • • Dual 4Kx18/16 allows 2-way set associative cache Byte enables for byte/word read/write 20ns/25 ns/30ns/35 ns Taa commercial

A011 transistor

Contextual Info: QS88180, QS88160 High-Speed CMOS Dual 4Kx16/18 SRAM with Latched Addresses Q 7 QS88180 Q S88160 Preliminary FEATURES/BENEFITS • • • • • Dual 4Kx18/16 allows 2-way set associative cache Byte enables 1or byte/word read/write 20ns/25 ns/30ns/35 ns Taa commercial

Contextual Info: QS88180, Q QS88160 High-Speed CMOS Dual 4Kx16/18 SRAM with Latched Addresses QS88180 QS88160 FEATURES/BENEFITS • Dual 4Kx18/16 allows 2-way set associative cache • Byte enables for byte/word read/write • 20ns/25 ns/30ns/35 ns Taa • Available in 52-pin PLCC

TAG 064

Abstract: power bank 5v S8818
Contextual Info: QS88182 Q High-Speed CMOS Dual 4Kx18 Cache Tag SRAM Q S88182 ADVANCE INFORMATION FEATURES/BENEFITS • • • • • • Dual 4Kx18 allows 2-way set associative cache tag MATCH lines per bank allow direct bank ÜE drive MATCH enable controls MATCH outputs for speed

TC55188

Abstract: TC55188T-25 TC55188T-20 TC55188T
Contextual Info: •»ilK 2 - W A Y 4,096 W ORDS x 18 BITS/8,192 WORDS x 18 BITS CMOS STATIC CACHE DATA RAM DESCRIPTION The TC55188T is a 147,456bits high-speed static RAM which can be user-configured either a s 2-way 4,096 words by 18 bits or as 8,192 words by 18 bits. It is provided with a byte control, on-chip

723653

Abstract: 72V7290 72V3613 72V7250 72V3611 72V3623 72V72100 72V7230 72V7240 72V7260
Contextual Info: Selector Guide for FIFO Memory Products • Synchronous FIFOs SuperSync II, SuperSync™ SyncFIFO™, DualSync™ • Bi-Directional Synchronous FIFOs • Asynchronous FIFOs the leading provider of FIFO memories. July’00 IDT FIFO Memory Products Quick Reference Guide

723653

Abstract: BI 7284 72V7250 72V72100 72V7230 72V7240 72V7260 72V7270 72V7280 72V7290
Contextual Info: Selector Guide for FIFO Memory Products • Synchronous FIFOs SuperSync II, SuperSync™ SyncFIFO™, DualSync™ • Bi-Directional Synchronous FIFOs • Asynchronous FIFOs the leading provider of FIFO memories. Jan’00 IDT FIFO Memory Products Quick Reference Guide

toshiba tc 97101

Abstract: tc 97101 M7401 M73049 "256K x 16" SRAM PLCC M73002 M7206 M7-300 M72016 T 9722
Contextual Info: CYPRESS SEMICONDUCTOR CORPORATION PRODUCT RELIABILITY REPORT QUARTER 3, 1997 PERFORM PER THE REQUIREMENT OF 25-00008, RELIABILITY MONITOR PROGRAM SPECIFICATION Marc Hartranft QA Engineering Department Manager CYPRESS SEMICONDUCTOR CORPORATION PRODUCT RELIABILITY REPORT

hct 4047 bt

Abstract: SN74ALS679 FCT Fast CMOS TTL Logic 74LS 4075 7804 inverter SN74368A DTL Logic 4069 CMOS hex inverter SN502 CD74AC374
Contextual Info: IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold

74HCT 4013

Abstract: CD4078 4093 BF SN74368A SN74ALS679 LXZ Series 4069 CMOS hex inverter 2a2 vacuum tube CD74AC374 cd408
Contextual Info: SN54HC240, SN74HC240 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS128B – DECEMBER 1982 – REVISED MAY 1997 D D SN54HC240 . . . J OR W PACKAGE SN74HC240 . . . DW OR N PACKAGE TOP VIEW 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers

IDT72T18105

Abstract: IDT72T18115 IDT72T18125 IDT72T1845 IDT72T1855 IDT72T1865 IDT72T1875 IDT72T1885 IDT72T1895
Contextual Info: 2.5 VOLT HIGH-SPEED TeraSync FIFO IDT72T1845, IDT72T1855 18-BIT/9-BIT CONFIGURATIONS IDT72T1865, IDT72T1875 2,048 x 18/4,096 x 9, 4,096 x 18/8,192 x 9, 8,192 x 18/16,384 x 9, IDT72T1885, IDT72T1895 16,384 x 18/32,768 x 9, 32,768 x 18/65,536 x 9, 65,536 x 18/131,072 x 9,

CY7C4271-JC

Abstract: cypress 98267 9832 CY5037
Contextual Info: CYPRESS SEMICONDUCTOR CORPORATION PRODUCT RELIABILITY REPORT QUARTER 4, 1998 PERFORM PER THE REQUIREMENT OF 25-00008, RELIABILITY MONITOR PROGRAM SPECIFICATION Ed Russell Reliability Manager CYPRESS SEMICONDUCTOR CORPORATION PRODUCT RELIABILITY REPORT Quarter 4, 1998

32kx18

Contextual Info: 2.5 VOLT HIGH-SPEED TeraSync FIFO PRELIMINARY IDT72T1845, IDT72T1855 18-BIT/9-BIT CONFIGURATIONS IDT72T1865, IDT72T1875 2,048 x 18/4,096 x 9, 4,096 x 18/8,192 x 9, 8,192 x 18/16,384 x 9, IDT72T1885, IDT72T1895 16,384 x 18/32,768 x 9, 32,768 x 18/65,536 x 9, 65,536 x 18/131,072 x 9,

DUP1

Contextual Info: FIJCRON TECHNOLOGY INC MICRON SSE T> • blllSMT DD037M3 DT4 ■ URN M T56C 2818 8 K x 18, DUAL 4 K x 18 C A CH E DATA SRAM ■ - ; CACHE DATA -0 4 - q q a i i

schematic diagram atx Power supply 500w

Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
Contextual Info: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455

BF208

Abstract: 8K*8 sram 70V7278 70V7288 70V7339 70V7519 70V7599 AN-306 5646 BC256
Contextual Info: BANK-SWITCHABLE APPLICATION DUAL-PORTS' NOTE FREQUENTLY ASKED QUESTIONS AN-306 What is a bank-switchable dualport? A bank-switchable dual-port or BSDP is an innovative multi-port memory solution that allows simultaneous access to common memory from two separate ports at

95A 640

Abstract: 70V7319 IDT70V7319 IDT70V7319S 7319S
Contextual Info: HIGH-SPEED 3.3V 256K x 18 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE IDT70V7319S Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ 256K x 18 Synchronous Bank-Switchable Dual-ported SRAM Architecture – 64 independent 4K x 18 banks – 4 megabits of memory on chip