1024KX1 Search Results

H31M1

Abstract: EDI8M11024C 901ac
Contextual Info: m o EDI8M11024C i Electronic D »*lgn i Inc. High Speed Megabit SRAM Module railDiOIMmf 1Mx1 Static RAM CMOS, High Speed Module Features The EDI8M11024C is an extremely high density, 1024Kx1 bit, high speed Static RAM module con­ structed using four 256Kx1 Static RAMs in leadlesschip

Contextual Info: WS512K32-XXX M/HITE /M ICROELECTRONICS 512Kx32 SRAM MODULE PRELIMINARY* Organized as 512Kx32, U se r C o n fig u ra b le as 1024Kx16 or 2 M x8 C o m m ercial, Industrial and M ilita r y T em peratu re R anges FEATURES TTL C o m p atib le Inputs and O utputs

EDI8M11024C

Contextual Info: ^E D I EDI8M11024C Electro nic D e s i g n i Inc. High Speed Megabit SRAM Module raiUMDMÂIHIY 1Mx1 Static RAM CMOS, High Speed Module Features The EDI8M11024C is an extremely high density, 1024Kx1 bit, high speed Static RAM module con­ structed using four 256Kx1 Static RAMs in leadless chip

H31M1

Abstract: EDI8M11024C
Contextual Info: EDI8M11024C ^E D I Electronic D »*lgn i Inc. High Speed Megabit SRAM Module railDiOIMmf 1Mx1 Static RAM CMOS, High Speed Module Features The EDI8M11024C is an extremely high density, 1024Kx1 bit, high speed Static RAM module con­ structed using four 256Kx1 Static RAMs in leadlesschip

Contextual Info: ^EDI EDI811024CS Electronic D««ign* Inci High Speed Megabit Monolithic SRAM iM x i Static RAM CMOS, High Speed Monolithic Features The EDI811024CS is an extremely high density, 1024Kx1 bit, high speed Static RAM designed for use in systems where fast computation, low power, and board

Contextual Info: EDI811024C 35/45/55/70 The fu tu re . . . today, • ■ w 1024KX1 SRAM CMOS, High Speed Monolithic Pin Configuration 1 C 2C 3C 4 C 5 C 6C 7C 8 n 9 C 10 C 11 C 12 : 13 C 14 C 30 EDI CMOS SRAM Data Book h h h h h h Features The ED 1811024C is an extremely high density,

0120d

Contextual Info: RDRAM 512Mb 1024Kx16/18x32s Advance Information Overview The RDRAM device is a general purpose high-performance memory device suitable for use in a broad range of applications including computer memory, graphics, video, and any other application where high bandwidth and low latency are required.

28-pin SOJ SRAM

Abstract: EDI811024CS 28 pin ceramic dip 1MX1 1Mx1 SRAM
Contextual Info: mol EDI811024CS Electronic D««ign* Inci High Speed Megabit Monolithic SRAM 1MX1 Static RAM CMOS, High Speed Monolithic Features The EDI811024CS is an extremely high density, 1024Kx1 bit, high speed Static RAM designed for use in systems where fast computation, low power, and board

Contextual Info: ^EDI EDI811024C 35/ 45/ 55/70 Monolithic The f u t u r e . . . today. Ä E W Ä M E D M F© ß?M Ä T[]© [N I 1024KX1 SRAM CMOS, High Speed Monolithic Features The ED 1811024C is an extremely high density, 1024Kx1 bit, high speed Static RAM designed for use

Contextual Info: moi EDI8M11024C Electronic D esign* In c. • High Speed Megabit SRAM Module 1Mx1 Static RAM CMOS, High Speed Module Features The EDI8M11024C is an extremely high density, 1024Kx1 bit, high speed Static RAM module con­ structed using four 256Kx1 Static RAMs in leadless chip

Contextual Info: ca WS512K32-XXX M/HITE /M IC R O E LE C TR O N IC S 512Kx32 SRAM MODULE p r e l im in a r y * • O rganized as 51 2Kx32, U se r C o n fig u ra b le as 1024Kx16 or 2M x8 ■ Co m m ercial, Industrial and M ilita r y T em peratu re R anges FEATU R ES ■ TTL C o m p atib le Inputs and O utputs

N16T1618C2A

Abstract: N16T1625C2A N16T1630C2A 1024Kx16bit
Contextual Info: NanoAmp Solutions, Inc. 1982B Zanker Road, San Jose, CA 95112 ph: 408-573-8878, FAX: 408-573-8877 www.nanoamp.com N16T1630C2 1 A N16T1625C2(1)A N16T1618C2(1)A Advance 1024Kx16bit Ultra-Low Power Asynchronous Static RAM Overview Features The N16T1630C2A, N16T1625C2A

Contextual Info: m o EDI8M11024C i E le c tro n ic D » * lg n i In c . High Speed Megabit SRAM Module railDiOIMmf 1Mx1 Static RAM CMOS, High Speed Module Features The EDI8M11024C is an extremely high density, 1024Kx1 bit, high speed Static RAM module con­ structed using four 256Kx1 Static RAMs in leadlesschip

a810c

Abstract: EDI811024CS
Contextual Info: EDI811024CS m D \ Electronic D *lg n * I n c * High Speed Megabit Monolithic SRAM 1Mx1 Static RAM CMOS, High Speed Monolithic ] i D[ Features The EDI811024CS is an extremely high density, 1024Kx1 bit, high speed Static RAM designed for use in systems where fast computation, low power, and board

IS61LPD51236A

Abstract: IS61LPD102418A IS61VPD102418A IS61VPD51236A
Contextual Info: IS61VPD51236a IS61VPD102418a IS61lPD51236a IS61LPD102418a 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and

IS61LPD102418A

Abstract: IS61LPD51236A IS61VPD102418A IS61VPD51236A
Contextual Info: ISSI IS61VPD51236A IS61VPD102418A IS61LPD51236A IS61LPD102418A 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and

IS61LPS102418A

Abstract: IS61LPS25672A IS61LPS51236A IS61VPS102418A IS61VPS25672A IS61VPS51236A IS61LPS51236A-200TQLI 1024Kx18
Contextual Info: IS61VPS25672A IS61LPS25672A IS61VPS51236A IS61LPS51236A IS61VPS102418A IS61LPS102418A ISSI 256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write

Contextual Info: LY62102616 1024K X 16 BIT LOW POWER CMOS SRAM Rev. 0.3 REVISION HISTORY Revision Rev. 0.1 Rev. 0.2 Rev. 0.3 Description Initial Issue Revised FEATURES & ORDERING INFORMATION Lead free and green package available to Green package available Added packing type in ORDERING INFORMATION

IR-021

Contextual Info: ISSI IS61VPD51236A IS61VPD102418A IS61LPD51236A IS61LPD102418A 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and

Contextual Info: IS61NLP25672/IS61NVP25672 IS61NLP51236/IS61NVP51236 IS61NLP102418/IS61NVP102418 256K x 72, 512K x 36 and 1M x 18 18Mb, PIPELINE 'NO WAIT' STATE BUS SRAM ISSI FEBRUARY 2005 FEATURES DESCRIPTION • 100 percent bus utilization The 18 Meg 'NLP/NVP' product family feature high-speed,

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Contextual Info: LY62L102616A Rev. 1.1 16M Bits 2Mx8 / 1Mx16 Switchable LOW POWER CMOS SRAM REVISION HISTORY Revision Rev. 1.0 Rev. 1.1 Description Initial Issue Correct typo error on the column “UB#”, “LB#” of truth table for row “Byte Read” “Byte Write” and “Output Disable” at

Contextual Info:  LY61L102516A 1024K X 16 BIT HIGH SPEED CMOS SRAM Rev. 1.2 REVISION HISTORY Revision Rev. 1.0 Rev. 1.1 Rev. 1.2 Description Initial Issued Added LY61L102516AGL Revised IOH/IOL = -8mA/4mA to IOH/IOL = -4mA/8mA in AC TEST CONDITIONS Lyontek Inc. reserves the rights to change the specifications and products without notice.

Contextual Info: LY62L102516 1024K X 16 BIT LOW POWER CMOS SRAM Rev. 1.0 REVISION HISTORY Revision Rev. 0.1 Rev. 0.2 Rev. 0.3 Rev. 0.4 Rev. 1.0 Description Initial Issue Added SL Spec. Added ISB1/IDR values when TA = 25℃ and TA = 40℃ Revised FEATURES & ORDERING INFORMATION

Contextual Info: LY62L102516A 1024K x 16 BIT LOW POWER CMOS SRAM Rev. 1.0 REVISION HISTORY Revision Rev. 1.0 Description Initial Issue Issue Date Jan. 09. 2012 Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.