1MX1 Search Results

K1S161611A

Abstract: K1S161611A-I
Contextual Info: Preliminary K1S161611A UtRAM Document Title 1Mx16 bit Uni-Transistor Random Access Memory Revision History Revision No. History Draft Date Remark Preliminary 0.0 Initial Draft October 6, 2003 0.1 Revised - Added Lead Free 48-FBGA-6.00x7.00 Product November 25, 2003 Preliminary

K7Q161852A

Abstract: K7Q161852A-FC10 K7Q161852A-FC13 K7Q161852A-FC16 K7Q163652A K7Q163652A-FC10 K7Q163652A-FC13 K7Q163652A-FC16
Contextual Info: K7Q163652A K7Q161852A 512Kx36 & 1Mx18 QDRTM b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit QDRTM SRAM Revision History History Draft Date Remark 0.0 1. Initial document. April, 30, 2001 Advance 0.1 1. Amendment 1 Page 3,4 PIN NAME DESCRIPTION W 4A) : from Read Control Pin to Write Control

K1S1616B1A

Abstract: K1S1616B1A-I
Contextual Info: Preliminary UtRAM K1S1616B1A Document Title 1Mx16 bit Uni-Transistor Random Access Memory Revision History Revision No. History 0.0 Initial Draft Draft Date Remark October 6, 2003 Preliminary The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and

10D-11

Abstract: K7R160982B K7R160982B-FC16 K7R160982B-FC20 K7R161882B K7R161882B-FC16 K7R161882B-FC20 K7R163682B K7R163682B-FC16 K7R163682B-FC20
Contextual Info: K7R163682B K7R161882B K7R160982B 512Kx36 & 1Mx18 & 2Mx9 QDR TM II b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit, 2Mx9-bit QDRTM II b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Oct. 17, 2002 Advance 0.1 1. Change the Boundary scan exit order.

K7Q161864B-FC16

Abstract: D0-35 K7Q161864B K7Q163664B K7Q163664B-FC16
Contextual Info: K7Q163664B K7Q161864B 512Kx36 & 1Mx18 QDRTM b4 SRAM Document Title 512Kx36-bit, 1Mx18-bit QDRTM SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Jan. 27, 2004 Advance 1.0 1. Final spec release Mar. 18, 2004 Final Rev. No. The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the

K7N161801A

Abstract: K7N163601A
Contextual Info: K7N163601A K7N161801A 512Kx36 & 1Mx18 Pipelined NtRAM TM Document Title 512Kx36 & 1Mx18-Bit Pipelined NtRAMTM Revision History Rev. No. History Draft Date Initial document. Add JTAG Scan Order Add x32 org and industrial temperature . Add 165FBGA package Speed bin merge.

LC3516AL-10

Abstract: LC3516A-10
Contextual Info: SANYO SEMICONDUCTOR - 3 B E C ORP D • 7 q ^ 7 Q 7b □□ 054 53 1 H9 CMOS DYNAMIC RAM Capacity Access Tim e Organization Words X Bits 1MX1 1M 256KX4 Type N o . T rac ns max L C 3 2 1 0 0 0 -1 0 /1 2 L C 3 2 1 0 0 0 J -1 0 /1 2 L C 3 2 10O O Z-1 0 /1 2

D0-35

Abstract: K7J161882B K7J161882B-FC16 K7J161882B-FC20 K7J161882B-FC25 K7J163682B K7J163682B-FC16 K7J163682B-FC20 K7J163682B-FC25
Contextual Info: K7J163682B K7J161882B 512Kx36 & 1Mx18 DDR II SIO b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Dec. 16, 2002 Advance 0.1 1. Change the JTAG Block diagram Dec. 26, 2002 Preliminary

Contextual Info: K7A163608A K7A163208A K7A161808A PRELIMINARY 512Kx36/x32 & 1Mx18 Synchronous SRAM Document Title 512Kx36/x32 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. 0.0 0.1 History Draft Date Remark 1. Initial draft 1. Add x32 org and industrial temperature

s - ck5t

Abstract: CA52
Contextual Info: Preliminary KMM5321200BW/BWG DRAM MODULE KMM5321200BW/BWG Fast Page Mode 1Mx32 DRAM SIM M , 1K Refresh, 5V, using 1Mx16 DRAM GENERAL DESCRIPTION FEATURES The Samsung KMM5321200BW is a 1M bit x 32 Dynam ic RAM high density m em ory module. The • Part Identification

KM416C1200AJ

Abstract: ra57
Contextual Info: DRAM MODULE KMM5321200AW/AWG KMM5321200AW/AWG Fast Page Mode 1Mx32 DRAM SIMM, 1K Refresh, 5V, using 1Mx16 DRAM G EN ER AL DESCRIPTION FEATURES The Samsung KMM5321200AW is a 1M bit x 32 Dynam ic RAM high density m em ory module. The • Part Identification

Contextual Info: PcRam TS1M9360 Description Features The TS1M9360 is a 1M by 9-bit dynamic RAM • 1,048,576-word by 9-bit organization. module with 2pcs of 1Mx4 and 1pc of 1Mx1 DRAMs • Fast Page Mode operation. assembled on the printed circuit board. • Single +5.0V ± 10% power supply.

Contextual Info: •HYUNDAI H Y 5 1 V 1 8 1 6 4 B ,H Y 5 1 V 1 6 1 6 4 B 1Mx16, Extended Data Out mode DESCRIPTION This fam ily is a 16M bit dynam ic RAM organized 1,048,576 x 16-bit configuration with Extended Data Out mode CMOS DRAMs. Extended data out mode is a kind of page mode w hich is useful for the read operation. The circuit and process

Contextual Info: 16Mbit Synchronous DRAM Series ♦HYUNDAI HY57V164010- 4Mx4bit Synchronous DRAM HY57V168010- 2Mx8blt Synchronous DRAM HY57V161610- 1Mx16bit Synchronous DRAM DESCRIPTION The HY57V164010, HY57V168010, HY57V161610 Programmable options include the length of are high speed 3.3 Volt synchronous dynamic RAMs

K7A161801M

Abstract: K7A163601M advh
Contextual Info: K7A163601M K7A161801M 512Kx36 & 1Mx18 Synchronous SRAM Document Title 512Kx36 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. History Draft Date Remark 0.0 Initial draft Jan. 18. 1999 Preliminary 0.1 1. Update ICC & ISB values. 2. Remove tCYC 117MHz -85

Contextual Info: 0316409C 4M x 412/10, 3.3V, SR. 0316169C 1M x 1612/8, 3.3V, SR. 0316809C 2M x 812/9, 3.3V, SR. 4Mx4, 2Mx8, 1Mx16 16Mbit Enhanced Synchronous DRAM Preliminary Features • High Performance: CAS latency = 2 fCK Clock Frequency tCK2 Clock Cycle tAC2 Clock Access Time

Contextual Info: 0316409C 4M x 412/10, 3.3V, SR. 0316169C 1M x 1612/8, 3.3V, SR. 0316809C 2M x 812/9, 3.3V, SR. 4Mx4, 2Mx8, 1Mx16 16Mbit Enhanced Synchronous DRAM Preliminary Data Sheet Overview Features • High Performance: CAS latency = 2 • Programmable Burst Length: 1,2,4,8,full-page

Contextual Info: K3N5V U 1000E-D(G)C CMOS MASK ROM 16M-Bit (2Mx8 /1Mx16) CMOS MASK ROM FEATURES GENERAL DESCRIPTION • Switchable organization 2,097,152 x 8(byte mode) 1,048,576 x 16(word mode) • Fast access time 3.3V Operation : 100ns(Max.)@CL=50pF, 120ns(Max.)@CL=100pF

NC-2H

Abstract: K7B161825A K7B163225A K7B163625A
Contextual Info: K7B163625A K7B163225A K7B161825A Preliminary 512Kx36/32 & 1Mx18 Synchronous SRAM Document Title 512Kx36/x32 & 1Mx18-Bit Synchronous Burst SRAM Revision History Rev. No. 0.0 0.1 0.2 History 1. Initial draft 1. Add JTAG Scan Order 1. Add x32 org and industrial temperature .

K7N161801A

Abstract: K7N163201A K7N163601A
Contextual Info: K7N163601A K7N163201A K7N161801A Preliminary 512Kx36/32 & 1Mx18 Pipelined NtRAMTM Document Title 512Kx36/32 & 1Mx18-Bit Pipelined NtRAMTM Revision History Rev. No. 0.0 0.1 0.2 0.3 Draft Date History 1. Initial document. 1. Add JTAG Scan Order 1. Add x32 org and industrial temperature .

Contextual Info: K3P5C1000D-D G C CMOS MASK ROM 16M-Bit (2Mx8 /1Mx16) CMOS MASK ROM FEATURES GENERAL DESCRIPTION • Switchable organization 2,097,152 x 8(byte mode) 1,048,576 x 16(word mode) • Fast access time Random Access : 100ns(Max.) Page Access : 30ns(Max.) 8 Words / 16 Bytes page access

Contextual Info: K3N5V U 1000E-TC CMOS MASK ROM 16M-Bit (2Mx8 /1Mx16) CMOS MASK ROM FEATURES GENERAL DESCRIPTION • Switchable organization 2,097,152 x 8(byte mode) 1,048,576 x 16(word mode) • Fast access time 3.3V Operation : 100ns(Max.)@CL=50pF, 120ns(Max.)@CL=100pF 3.0V Operation : 120ns(Max.)@CL=100pF

K7A161801A

Abstract: K7A163201A K7A163601A
Contextual Info: K7A163601A K7A163201A K7A161801A PRELIMINARY 512Kx36/32 & 1Mx18 Synchronous SRAM Document Title 512Kx36/32 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. 0.0 0.1 0.2 History Draft Date Remark 1. Initial draft 1. Add x32 org and industrial temperature .

TC5118160

Abstract: msm-561 TMS444000 msm561 M5M418165 M5M418160 tms44c256 TC5117405 HY514264 HY514260
Contextual Info: New Page 1 DRAM 1Meg 1Mx1 256Kx4 FPM FPM Fujitsu MB81C100 MB81C4256 Goldstar GM71C100 GM71C4256 Hitachi HM511000 HM514256 Hyundai HY531000 HY534256 Micron MT4C1024 MT4C4256 Mitsubishi M5M41000 M5M44256 Nec UPD421000 UPD424256 Oki MSM511000 MSM514256 Samsung alt KM41C1000 KM44C256