025752T Search Results

aeg diode Si 11 K

Abstract: aeg diode Si 11 aeg Diode D6 aeg diode Si 11 n
Contextual Info: ADV MICRO P LA / P L E / A R R AY S It D E | 02S75EL. OOSTMST Û T-46-13-47 Zero Power CMOS Hard Array Logic ZHAL 24A Series Features/Benefits Ordering information • Zero standby power PART NUM BER • Low power operation PACKAGE • High-speed C M O S technology

Contextual Info: FINAL a COM’L: -12 Advanced Micro Devices M A C H L V 2 1 0 - 1 2 High Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3-V JEDEC compatible — V c c = +3.0 V to +3.6 V ■ 58 MHz fMAxexternal Commercial ■ 38 Inputs with advanced pull-up/pull-down

mach 3 family amd

Abstract: circuit diagram of QS 8005 PAL26V16 D750 MACH110 MACH210 MACH215 PAL22V10 mach 1 family amd NS4N
Contextual Info: FINAL COM’L: -7.5/10/12/15/20 IND: -10/12/14/18/24 M A C H 2 1 1 -7 / 1 0 / 1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic Z I Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 64 Macrocells ■ Programmable power-down mode ■ 32 Outputs

PAL16l8 MMI

Abstract: PAL16LA OO3A MARKING PAL 006A pal 007a PLA 16L8 PAL16L8 programming algorithm IC PALCE16 mmi pla programmer reference guide pal 005a
Contextual Info: ADV HICRO PLA/PLE/ARRAYS C O M ’L 2flE 0aS7S2b D OGa^Mb- M IL P A L 1 6 R 8 il \ T -4 6 —1 9 -1 3 Am>a 5 Advanced Micro Devices F a m i l y 20-pin TTL P rogram m able Array Logic DISTINCTIVE CHARACTERISTICS • As fast as 7.5 ns maximum propagation delay

Contextual Info: FINAL IND: -20 a PALLV16V8Z-20 Advanced Micro Devices Low-Voltage, Zero-Power, 20-Pin EE CMOS Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3 V JEDEC compatible ■ Direct plug-in replacement for the PAL16R8 series and most of the PAL10H8 series

Contextual Info: FIN AL M A C H 1 1 1 COM’L: -5/7.5/10/12/15/20 IND: -7.5/10/12/14/18/24 AM D£t F a m ily High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ Programmable power-down mode ■ 32 Macrocells ■ 32 Outputs ■ 5 ns tPD ■ 32 Flip-flops; 4 clock choices

Contextual Info: COM'L: -15/25 IND: -12/15/25 PALCE16V8Z FAMILY a Advanced Micro Devices Zero-Power 20-Pin EE CMOS Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS • Zero-Power CMOS technology — 15 nA Standby Current — 12 ns propagation delay for “-12” version

Contextual Info: F IN A L COM’L: -12/15/20 IND: -14/18/24 MACH215-12/15/20 High-Density EE CMOS Programmable Logic a Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 32 Output Macrocells ■ ■ ■ ■ 67 MHz fMAx external Commercial 42 MHz fMAx external Industrial

Contextual Info: COM’L: H-25 Advanced Micro Devices PALCE29M A16H-25 24-Pin EE CMOS Programmable Array Logic DISTINCTIVE CHARACTERISTICS • High-performance semicustom logic replacement; Electrically Erasable EE technology allows reprogrammability ■ 16 bidirectional user-programmable I/O logic

Contextual Info: FINAL COM’L: -12 a MACH210AQ-12 Advanced Micro Devices High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 32 Outputs ■ 64 Macrocells ■ 64 Flip-flops; 2 clock choices ■ 12 ns tPD Commercial ■ 4 “PAL22V16” blocks with buried macrocells

pal22v10

Abstract: AMPAL22V10APC
Contextual Info: COM’L :-7/10/15 MIL: -12/20 a Advanced Micro Devices PAL22V10 Family, AmPAL22V10/A 24-Pin TTL Versatile PAL Device DISTINCTIVE CHARACTERISTICS • As fast as 7.5 ns propagation delay and 91 MHz fMAx external ■ 10 Macrocells programmable as registered or

pal 007a

Abstract: MACH21D PAL 006A PAL 002a pal 005a MACH110 MACH210 MACH215 PAL22V10 PAL22V16
Contextual Info: FINAL COM’L: -7/10/12/15/20, Q-12/15/20 IND: -12/14/18/24 M ACH21OA-7/10/12 MACH210-12/15/20 MACH210AQ-12/15/20 a Advanced Micro Devices High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Peripheral Component Interconnect PCI compliant

5962-8605301LX

Abstract: AMPAL22V10PC AMPAL22V10 CD3024 PD3024 5962-86053013X 527Q
Contextual Info: ADV MICRO P LA /P LE/ARR AY S dË J 055 752 b 0057310 1 T 'Y é '/3 - * /? AmPAL22V10 24-Pin IMOX Programmable Array Logic PAL Distinctive Characteristics • Second-generation PAL device architecture • • • • Increased logic power — up to 22 inputs and 10 outputs

12H6

Abstract: 14L4 PAL10H8 12L6 10H8 16L2 4h4 1 pin shourd 10L8 16C1
Contextual Info: ADV MICRO PLA /P L E / A RR A Y S =ib U2 b 7526 ADV M I C R O P L A / P L E / A R R A Y S Combinatorial PALI 0H8 Series D E | 055755b 00H711 96D 1 0 H 8 , 1 2 H 6 , 27114 1 4 H D T -V 6 - / 3 - V 7 4 , 1 6 H 2 1 6 C 1 1 0 L 8 , 1 2 L 6 , 1 4 L 4 -, 1 6 L 2

Monolithic Memories PAL20L8

Contextual Info: ADV MICRO PLA/PLE/ARRAYS 1 t D È I üaS?S 5t DD571S0 T-46-13-47 20L8, 20R8 20R6, 20R4 PAL20R8 Family F eatures/B enefits Perform ance • Standard 24-pln architectures Several speed/power versions are available. • TTL and CMOS versions • High speed, as fast as 15 ns tPD for PAL20R8B Series

Contextual Info: COM’L: -25 IND: -15/25 Advanced Micro Devices PALCE22V10Z Family Zero-Power 24-Pin EE CMOS Versatile PAL Device DISTINCTIVE CHARACTERISTICS • Zero-power CMOS technology — 30 fiA standby current — As fast as 15 ns first-access propagation delay and 50 MHz fMAx external

AMD K6

Contextual Info: ADV MI C R O PLA/PLE/ARRAYS 13E' D | 0 2 5 7 5 2 b 0 0 2 3 7 7 3 ñ 3000 SERIES FAMILY OF PROGRAMMABLE GATE ARRAYS PRELIM INARY D ISTIN C TIVE * • ♦ • C H A R AC TERISTIC S Second generation user-programmable gate • array • Flexible array architecture

mach435

Contextual Info: FIN A L COM’L: -12/15/20, Q-20/25 Advanced Micro Devices MACH435-12/15/20, Q-20/25 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Flexible clocking ■ 84 Pins in PLCC ■ 128 Macrocells ■ — Four global clock pins with selectable edges

ALU IC 74181 circuit diagram

Abstract: TTL 74189
Contextual Info: ]>î| G5S7S5b DOEIOOB 1 ADV MICRO P LA /P LE/A RR AY S 7h 0 2 5 7 5 2 6 ADV MICRO PLA/PLE/ARRAYS 76C 21003 T-42-11-09 A m 7 2 2 a Q 2200 Gate HCMOS Evaluation Macrocell Array & ¡ it PRELIMINARY > 3 •Vj DISTINCTIVE CHARACTERISTICS Delay measurement block:

AmPAL23S8-30

Contextual Info: A DV MICRO PLA/PLE/ARRAYS , Tt. D e | 02S7S2t, 0 0 2 7 2 2 7 1 T -V 4 -/3 -V 7 AmPAL23S8 20-Pin IMOX PAL Device-Based Sequencer Distinctive C haracteristics • • • • • 14 Registers - 4 Output Logic Macrocells OLMs - 4 Output Registers - 6 Buried State Registers (BSRs)

Contextual Info: CO M 'L: H-25 Advanced Micro Devices PALCE29MA16H-25 24-Pin EE CMOS Programmable Array Logic DISTINCTIVE CHARACTERISTICS • H igh-perform ance sem icustom logic replacem ent; E lectrically Erasable EE technology allow s reprogram m ability ■ 16 bidirectional user-program m able I/O logic

Contextual Info: F IN A L COM ’L : -15/20 IN D :-18/24 a M A C H Advanced Micro Devices L V 2 1 0 -1 5 /2 0 High Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3-V JEDEC compatible ■ 50 MHz 40 MHz — V Cc = +3.0 V to +3.6 V

Contextual Info: COM’L: -7.5 Î1 MACH210A-7 Advanced Micro Devices High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins 32 Outputs ■ 64 Macrocells 64 Flip-flops; 2 clock choices ■ 7.5 ns 4 “PAL22V16” blocks with buried macrocells ■ tpD

Contextual Info: FINAL COM’L: -10/12/15/20, Q-15/20 IND: -12/14/18/24 M A C H 2 1 0 A -1 0 M A C H 2 1 0 -1 2 /1 5 /2 0 M A C H 2 1 O A Q -1 5 /2 0 High-Density EE CMOS Programmable Logic a Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 64 Macrocells