02S7S2T Search Results

AmPAL23S8-30

Contextual Info: A DV MICRO PLA/PLE/ARRAYS , Tt. D e | 02S7S2t, 0 0 2 7 2 2 7 1 T -V 4 -/3 -V 7 AmPAL23S8 20-Pin IMOX PAL Device-Based Sequencer Distinctive C haracteristics • • • • • 14 Registers - 4 Output Logic Macrocells OLMs - 4 Output Registers - 6 Buried State Registers (BSRs)

mach 3 family amd

Abstract: circuit diagram of QS 8005 PAL26V16 D750 MACH110 MACH210 MACH215 PAL22V10 mach 1 family amd NS4N
Contextual Info: FINAL COM’L: -7.5/10/12/15/20 IND: -10/12/14/18/24 M A C H 2 1 1 -7 / 1 0 / 1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic Z I Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 64 Macrocells ■ Programmable power-down mode ■ 32 Outputs

Contextual Info: FINAL COM’L: -12 a MACH210AQ-12 Advanced Micro Devices High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 32 Outputs ■ 64 Macrocells ■ 64 Flip-flops; 2 clock choices ■ 12 ns tPD Commercial ■ 4 “PAL22V16” blocks with buried macrocells

PALC18U8Q

Abstract: CAN I REPLACE PAL 007 E WITH PAL 007 B PALC18U8Q25 PALC18U8 PAL 007 diagrams
Contextual Info: ADV MICRO P L A / P L E / ARRAYS 13E D | 055752k 0020005.7 | PALC18U8Q-25 PALC18U8Q-35 CMOS Universal Programmable Array Logic U.S. Patents 4124899 and 4717912 a "ö > 00 DISTINCTIVE CHARACTERISTICS CMOS technology provides quarter power only 55 mA while matching bipolar speeds

LT016

Abstract: LT08 YD-350 ecu schematics AIX200 LT08C LBd8 AIX2024 COF2001
Contextual Info: ADV faCRO PLA/PLE/ARRAYS 13E D Am353 b oas?sat, aoaasib 1 1 Mixed ECL/TTL I/O Mask-Programmable Gate Array > 3 DISTINCTIVE CHARACTERISTICS Integrated up to 410 ECL-equivalent gates in a 24-pin slim DIP , to eliminate "g lu e " logic, resulting in reduced

PALCE16VQ-25

Abstract: palce16v8 programming guide palce16v8h20
Contextual Info: COM’L: H-5/7/10/15/25,0-10/15/25 IND: H-10/15/25, Q-20/25 MIL: H-15/20/25 PALCE16V8 Family EE CMOS 20-Pin Universal Programmable Array Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Pin, function and fuse-map compatible with all 20-pin GAL devices

Contextual Info: AÎ>V MICRO PLA/PLE /AR RAYS b4E D □25752b 003357Ö 2D5 IND: -25/30 il PALLV16V8Z Family Low-Voltage, Zero-Power, 20-Pin EE CMOS Universal Programmable Array Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3 V JEDEC

AMD K6

Contextual Info: ADV MI C R O PLA/PLE/ARRAYS 13E' D | 0 2 5 7 5 2 b 0 0 2 3 7 7 3 ñ 3000 SERIES FAMILY OF PROGRAMMABLE GATE ARRAYS PRELIM INARY D ISTIN C TIVE * • ♦ • C H A R AC TERISTIC S Second generation user-programmable gate • array • Flexible array architecture

Contextual Info: FINAL COM’L: -15/20 IND: -18/24 & M A C H 13 0 -1 5 /2 0 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 84 Pins ■ 70 Inputs ■ 64 Macrocells ■ 64 Outputs ■ 15 ns tPD Commercial I S n s t p D Industrial

Contextual Info: F IN A L COM ’L : -15/20 IN D :-18/24 a M A C H Advanced Micro Devices L V 2 1 0 -1 5 /2 0 High Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3-V JEDEC compatible ■ 50 MHz 40 MHz — V Cc = +3.0 V to +3.6 V

Contextual Info: COM’L: -7.5/10/12/15/20 IND: -10/12/14/18/24 M A C H 2 1 1 S P -7 / 1 0 / 1 2 / 1 5 /2 0 AMDÌ1 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • JTAG-Compatible, 5-V in-system programming ■ 44 Pins ■ Peripheral Component Interconnect PCI

MACH465

Abstract: MACH465-12 MACH465-15 ge-57
Contextual Info: FINAL M A C H 4 6 COM’L: -12/15/20 5 - 1 2 / 1 5 / 2 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 208 pins in PQFP ■ Up to 20 product terms per function, with XOR ■ JTAG, 5-V, in-circuit programmable