VM 256MB DDR400 Search Results

S80032VMCTW-75A

Abstract: s80032vmctw vm 256MB DDR 400 sdram spectek SpecTek SpecTek SDRAM 256Mb DDR266 DDR333 DDR400B PC2100
Contextual Info: 256Mb: x4, x8, x16 DDR SDRAM DOUBLE DATA RATE DDR SDRAM Plastic Package: 66-pin TSOP – OCPL (400 mil width, 0.65mm pin pitch) 60-ball FBGA (8mm X 14mm, 60 Ball) FEATURES • PC2100, PC2700, and PC3200 compatible • VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V (For –6A & 75A)

S80032VMCTW-75A

Abstract: vm 256MB DDR 400 SpecTek DDR266 DDR333 DDR400B PC2100 PC2700 PC3200 256mb ddr333 200 pin
Contextual Info: 256Mb: x4, x8, x16 DDR SDRAM DOUBLE DATA RATE DDR SDRAM 60-ball FBGA (8mm X 14mm, 60 Ball) FEATURES • ROHS Compliant • PC2100, PC2700, and PC3200 compatible • VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V (For –6A & - Package Types (Leaded): 66-pin Plastic TSOP, OCPL

S80032VMCTW-75A

Abstract: s80032vmctw S80032 S160016 vm 256MB DDR 400 SpecTek DDR266 DDR333 DDR400B PC2100
Contextual Info: 256 Mb: x4, x8, x16 DDR SDRAM DOUBLE DATA RATE DDR SDRAM S40064 – 16 Meg x 4 x 4 banks S80032 – 8 Meg x 8 x 4 banks S160016 – 4 Meg x 16 x 4 banks FEATURES OPTIONS (continued) • PC2100, PC2700 and PC3200 compatible • VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V (For –6A &

HYB18TC256160BF

Contextual Info: February 2007 HYB18T C25616 0 BF 256-Mbit Double-Data-Rate-Two SDRAM DDR2 SDRAM RoHS Compliant Products Internet Data Sheet Rev. 1.21 Internet Data Sheet HYB18TC256160BF 256-Mbit Double-Data-Rate-Two SDRAM HYB18TC256160BF Revision History: 2007-02, Rev. 1.21

HYB18TC256160BF-3S

Abstract: VM 256MB DDR400 HYB18TC256800BF 800E DDR400
Contextual Info: May 2007 HYB18T C25680 0 BF HYB18T C25616 0 BF 256-Mbit Double-Data-Rate-Two SDRAM DDR2 SDRAM RoHS Compliant Products Internet Data Sheet Rev. 1.3 Internet Data Sheet HYB18TC256[80/16]0BF 256-Mbit Double-Data-Rate-Two SDRAM Revision History: Rev. 1.3, 2007-05

RCD 1230 SAMSUNG

Contextual Info: 512Mb M-die DDR-II SDRAM Target 512Mb M-die DDR-II SDRAM Specification Version 0.8 Rev. 0.8 Nov. 2002 Page 1 of 80 512Mb M-die DDR-II SDRAM Target Contents 1. Key Feature 2. Package Pinout & Addressing 2.1 Package Pintout 2.2 Input/Output Function Description

Contextual Info: HY5PS12421 L F HY5PS12821(L)F HY5PS121621(L)F 512Mb DDR2 SDRAM HY5PS12421(L)F HY5PS12821(L)F HY5PS121621(L)F This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied.

DDR533

Abstract: K4T51043QM-GCD4 K4T51043QM-GCE5 K4T51043QM-GLD4 K4T51043QM-GLE5
Contextual Info: 512Mb M-die DDR-II SDRAM Target 512Mb M-die DDR-II SDRAM Specification Version 0.8 Rev. 0.8 Nov. 2002 Page 1 of 80 512Mb M-die DDR-II SDRAM Target Contents 1. Key Feature 2. Package Pinout & Addressing 2.1 Package Pintout 2.2 Input/Output Function Description

VM 256MB DDR400

Abstract: ddr2 pin
Contextual Info: HY5PS56421 L F HY5PS56821(L)F HY5PS561621(L)F 256Mb DDR2 SDRAM HY5PS56421(L)F HY5PS56821(L)F HY5PS561621(L)F This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied.

Contextual Info: HY5PS56421 L F HY5PS56821(L)F HY5PS561621(L)F 256Mb DDR2 SDRAM HY5PS56421(L)F HY5PS56821(L)F HY5PS561621(L)F This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied.

Contextual Info: HY5PS56421 L F HY5PS56821(L)F HY5PS561621(L)F 256Mb DDR2 SDRAM HY5PS56421(L)F HY5PS56821(L)F HY5PS561621(L)F This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied.

Contextual Info: PRELIMINARY V59C1G01 408/808/168 QA HIGH PERFORMANCE 1Gbit DDR2 SDRAM 8 BANKS X 32Mbit X 4 (408) 8 BANKS X 16Mbit X 8 (808) 8 BANKS X 8Mbit X 16 (168) 5 37 3 25 18 DDR2-400 DDR2-533 DDR2-667 DDR2-800 DDR2-1066 Clock Cycle Time (tCK3) 5ns 5ns 5ns 5ns 5ns Clock Cycle Time (tCK4)

V59C1

Contextual Info: PRELIMINARY V59C1G01 408/808/168 QA HIGH PERFORMANCE 1Gbit DDR2 SDRAM 8 BANKS X 32Mbit X 4 (408) 8 BANKS X 16Mbit X 8 (808) 8 BANKS X 8Mbit X 16 (168) 5 37 3 25A 25 18 DDR2-400 DDR2-533 DDR2-667 DDR2-800 DDR2-800 DDR2-1066 Clock Cycle Time (tCK3) 5ns 5ns 5ns

Contextual Info: PRELIMINARY DATA SHEET 256M bits DDR2 SDRAM EDE2504AASE 64M words x 4 bits EDE2508AASE (32M words × 8 bits) EDE2516AASE (16M words × 16 bits) Description Features The EDE2504AA is a 256M bits DDR2 SDRAM organized as 16,777,216 words × 4 bits × 4 banks.

Contextual Info: PRELIMINARY DATA SHEET 256M bits DDR2 SDRAM for HYPER DIMM EDE2508ABSE-GE 32M words x 8 bits EDE2516ABSE-GE (16M words × 16 bits) Description Features The EDE2508ABSE is a 256M bits DDR2 SDRAM organized as 8,388,608 words × 8 bits × 4 banks. It is packaged in 60-ball FBGA (µBGA) package.

Contextual Info: PRELIMINARY DATA SHEET 256M bits DDR2 SDRAM for HYPER DIMM EDE2508AASE-DF, -BE, -AE 32M words x 8 bits EDE2516AASE-DF, -BE, -AE (16M words × 16 bits) Description Features The EDE2508AA is a 256M bits DDR2 SDRAM organized as 8,388,608 words × 8 bits × 4 banks.

Contextual Info: PRELIMINARY DATA SHEET 256M bits DDR2 SDRAM for HYPER DIMM L EO EDE2508AASE-DF, -BE, -AE 32M words x 8 bits EDE2516AASE-DF, -BE, -AE (16M words × 16 bits) Features The EDE2508AA is a 256M bits DDR2 SDRAM organized as 8,388,608 words × 8 bits × 4 banks.

ede2508abse-5c-e

Contextual Info: PRELIMINARY DATA SHEET 256M bits DDR2 SDRAM EDE2508ABSE 32M words x 8 bits EDE2516ABSE (16M words × 16 bits) Description Features The EDE2508ABSE is a 256M bits DDR2 SDRAM organized as 8,388,608 words × 8 bits × 4 banks. It is packaged in 60-ball FBGA (µBGA) package.

VM 256MB DDR400

Abstract: DDR2-700
Contextual Info: PRELIMINARY DATA SHEET 256M bits DDR2 SDRAM for HYPER DIMM EDE2508AASE-DF, -BE, -AE 32M words x 8 bits EDE2516AASE-DF, -BE, -AE (16M words × 16 bits) Description Features The EDE2508AA is a 256M bits DDR2 SDRAM organized as 8,388,608 words × 8 bits × 4 banks.

VM 256MB DDR400

Contextual Info: PRELIMINARY DATA SHEET 256M bits DDR2 SDRAM EDE2504AASE 64M words x 4 bits EDE2508AASE (32M words × 8 bits) EDE2516AASE (16M words × 16 bits) Description Features The EDE2504AA is a 256M bits DDR2 SDRAM organized as 16,777,216 words × 4 bits × 4 banks.

N2TU51216

Abstract: N2TU51280DE-BE
Contextual Info: N2TU51280DE / N2TU51216DG Preliminary 512Mb DDR2 SDRAM Feature CAS Latency Frequency -3C -AC -BE -BD DDR2-667-CL5 (DDR2-800-CL5) (DDR2-1066-CL7) (DDR2-1066-CL6) Speed Bins Units Parameter Min. Max. Min. Max. Min. Max. Min. Max. tCK(Avg.) Clock Frequency

NT5TU32M16DG

Contextual Info: NT5TU64M8DE / NT5TU32M16DG 512Mb DDR2 SDRAM Feature CAS Latency Frequency -3C/3CI* -AC/ACI* -BE* -BD* DDR2-667-CL5 (DDR2-800-CL5) (DDR2-1066-CL7) (DDR2-1066-CL6) Speed Bins Units Parameter Min. Max.

NT5TU32M16DG

Abstract: Nanya NT5TU32M16DG NT5T
Contextual Info: NT5TU64M8DE / NT5TU32M16DG 512Mb DDR2 SDRAM Feature CAS Latency Frequency -3C/3CI* -AC/ACI* -BE* -BD* DDR2-667-CL5 (DDR2-800-CL5) (DDR2-1066-CL7) (DDR2-1066-CL6) Speed Bins Units Parameter Min. Max.

nt5tu32m16dg

Abstract: NT5TU32M16DG-AC Nanya NT5TU32M16DG NT5TU32M16DG-BE NT5TU64M8DE NT5TU32M16DG-ACI NT5TU32M16DG-3C NT5TU64M8 NT5TU32M16DG AC NT5TU32M16DG-BD
Contextual Info: NT5TU64M8DE / NT5TU32M16DG 512Mb DDR2 SDRAM Feature CAS Latency Frequency -3C/3CI* -AC/ACI* -BE* -BD* DDR2-667-CL5 (DDR2-800-CL5) (DDR2-1066-CL7) (DDR2-1066-CL6) Speed Bins Units Parameter Min. Max. Min. Max. Min. Max. Min. Max. tCK(Avg.) Clock Frequency