VIRTEX4 UART Search Results

camera-link to hd-SDI converter

Abstract: Virtex-4QV DS-KIT-FX12MM1-G AES-S6DEV-LX150T-G VHDL code for ADC and DAC SPI with FPGA spartan 3 ADQ0007 XC6SL AES-XLX-V4FX-PCIE100-G SPARTAN-3 XC3S400 based MXS3FK ADS-XLX-SP3-EVL400
Contextual Info: Product Selection Guides Table of Contents February 2010 Virtex Series . 2 Spartan Series . 6

philips RC5 protocol

Abstract: rc5 protocol Manchester CODING DECODING FPGA philips RC5 decoder RC5 IR home theater IR remote control circuit diagram virtex 2 pro manchester encoder xilinx RC5 encoder RC5 philips
Contextual Info: 5-bit address and 6-bit command length IR-RC5-E and -D Bi-phase coding also known as Manchester coding Infrared Encoder and Decoder Cores Carrier frequency of 36 kHz as per the RC5 standard Fully synchronous design Encoder Features This pair of cores implements an Encoder and a Decoder for Consumer IR (CIR) infrared remote control signals using the popular RC5 IR protocol, originally developed by

NEC protocol

Abstract: NEC IR virtex 2 pro NEC protocol datasheet home theater IR remote control circuit diagram circuit diagram for simple IR receiver IR LED and photodiode pair Virtex4 XC4VFX60 Spartan 3E IR MODULE 3-8 decoder circuit diagram
Contextual Info: 8-bit address and 8-bit command length IR-NEC-E and -D Carrier frequency of 38 kHz as per the NEC standard Infrared Encoder and Decoder Cores Pulse distance modulation This pair of cores implements an Encoder and a Decoder for Consumer IR CIR infrared remote control signals using the popular NEC IR protocol. The cores are available

ARM11 mpcore

Abstract: ARM11 ARM1026EJ-S ARM1136J-S ARM11MP
Contextual Info: The ARM RealView® family of feature rich development boards provides an excellent environment for prototyping system-on-chip designs. Through a range of plug-in options, hardware and software applications can be developed and debugged. The high performance Versatile family enhances the end-user experience for

microblaze web server

Abstract: ML403 lwIP xilinx ML402 virtex-4 fx12 evaluation board UCF virtex-4 ML401 ML402 XAPP433 XC4VSX35-FF668-10C
Contextual Info: Application Note: Virtex-4 Family R XAPP433 v2.2 October 13, 2006 Embedded System Example: Web Server Design Using MicroBlaze Soft Processor Authors: Robert Armstrong, Martin Muggli, Matthew Ouellette, and Sathyanarayanan Thammanur Summary This application note describes an embedded system example design of a Web server running

ML403 ucf file

Abstract: ML403 microblaze web server RAMB16 virtex ucf file 6 XAPP434 Xilinx Ethernet development WebServer microblaze ethernet 0x80400000
Contextual Info: Application Note: Virtex-4 Family Web Server Reference Design Using a PowerPC-Based Embedded System R XAPP434 v2.2 October 13, 2006 Summary Author: Martin Muggli, Matthew Ouellette, Sathyanarayanan Thammanur, Robert Armstrong, Jr. This application note details an embedded system example design of a Web server running on

ARM1176JZF-S

Abstract: ARM1176JZFS trustzone applications of arm processor SD card controller vga pci card schematics PB1176JZF-S intel 128MB NOR FLASH ARM1176 PB1176
Contextual Info: ® The ARM RealView family of feature rich development boards provides an excellent environment for prototyping system-on-chip designs. Through a range of plug-in options, hardware and software applications can be developed and debugged. The high performance Versatile family enhances the end-user experience for

TAG 8426

Abstract: tag 8606 cisco 2821 RGMII phy RGMII constraints structure of GMII packet with VLAN Tag LocalLink sgmii soft temac constraints for virtex4 tc 3086
Contextual Info: XPS LL TEMAC v2.02a DS537 June 24, 2009 Product Specification Introduction LogiCORE Facts This document provides the design specification for the XPS_LL_TEMAC soft Ethernet core. This core provides a control interface to internal registers via a 32-bit

16550A

Abstract: H16550S
Contextual Info: Capable of running all existing 16450 and 16550a software H16550S UART with FIFOs and Synchronous CPU Interface Core The H16550S is a standard UART providing 100% software compatibility with the popular Texas Instruments 16550 device. It performs serial-to-parallel conversion on data

H16450S

Contextual Info: Capable of running all existing 16450 software H16450S UART with Synchronous CPU Interface Core The H16450S is a standard UART providing 100% software compatibility with the popular Texas Instruments 16450 device. It performs serial-to-parallel conversion on data

Xilinx SPARTAN

Abstract: EMV2000 Virtex 4 uart XC3S200 XC2V250-5
Contextual Info:  Supports the ISO/IEC 7816- 3:1997 E and EMV2000 4.0 specifications SCR-APB Smart Card Reader Core for APB  Performs functions needed for complete smart card sessions, including: − Card activation and deactiva- tion − Cold/warm reset − Answer to Reset (ATR) re-

XC4VLX25

Abstract: Xilinx SPARTAN EMV2000 XC2V250-5 XC3S250E
Contextual Info: Supports the ISO/IEC 78163:1997 E and EMV2000 4.0 specifications SCR Smart Card Reader Controller Core Performs functions needed for complete smart card sessions, including: − Card activation and deactiva- tion − Cold/warm reset − Answer to Reset (ATR) re-

16750 UART texas instruments

Abstract: 16750 UART uart 16750 H16750S uart 16750 baud rate
Contextual Info: Capable of running all existing 16450 and 16550a software Fully Synchronous design. All inputs and outputs are based on the rising edge of clock H16750S UART with FIFOs, IrDA, and Synchronous CPU Interface Core The H16750S is a standard UART providing 100% software compatibility with the popular Texas Instruments 16750 device. It performs serial-to-parallel conversion on data

XC5VLX50FFG676

Abstract: XC5VLX50TFF1136 XC4VFX12-FF668 HW-V5-ML507-UNI-G XC5VFX100TFF1136 VIRTEX-5 DDR PHY ML510 Virtex-5 LX50 VIRTEX-5 ff1136
Contextual Info: ML501 ML505 ML506 Purpose: General purpose FPGA development board. Board Part Number: HW-V5-ML501-UNI-G Device Supported: XC5VLX50FFG676 Price: $995 Purpose: General purpose FPGA and RocketIO GTP Development Platform. Board Part Number: HW-V5-ML505-UNI-G Device Supported: XC5VLX50TFF1136

Contextual Info: LogiCORE IP XPS Universal Serial Bus 2.0 Device v7.01a DS639 October 16, 2012 Product Specification Introduction LogiCORE IP Facts Table The Xilinx Universal Serial Bus 2.0 High Speed Device with Processor Local Bus (PLB) v4.6 enables Universal Serial Bus (USB) connectivity to a user design with a

vhdl code 64 bit FPU

Abstract: vhdl code for march c algorithm vhdl code for pipelined matrix multiplication ieee floating point vhdl vhdl code for FFT 32 point ML403 UART ml403 vhdl code for matrix multiplication vhdl code for floating point matrix multiplication XILINX UART lite
Contextual Info: APU Floating-Point Unit v3.1 March 11, 2008 Product Specification Introduction LogiCORE Facts The Xilinx Auxiliary Processor Unit APU Floating-Point Unit LogiCORETM is a single-precision floating-point unit designed for the PowerPCTM 405 embedded microprocessor of the VirtexTM-4 FX FPGA

ORELA 4500

Abstract: ARC 625D PNX5 CW4512 PNX5220 ZSP540 interface of IR SENSOR with SPARTAN3 FPGA ARC 725D TMS320LF24xx digital hearing aids
Contextual Info: 2005 EDN DSP Directory DSP devices and cores Company Device/family core Target applications Altera www.altera.com Cyclone II HardCopy II Consumer, communications, industrial, computer Video/image processing, wireless, wireline, industrial, test and measurement

XC95288XL evaluation board schematic

Abstract: uart vhdl fpga UCF virtex4 microblaze ethernet XAPP441 SPARTAN-3e microblaze E28F640 P160 X441 XC2C256
Contextual Info: Application Note: Xilinx FPGA Remote FPGA Reconfiguration Using MicroBlaze or PowerPC Processors R XAPP441 v1.1 September 9, 2006 Summary Author: KY Park and Hyuk Kim Field upgradeability is one of the key features of recent FPGA based systems. This application

R8051XC2

Abstract: verilog code for baud rate generator verilog code R8051XC2 r8051xc2-b 80515 80517 frequency counter using 8051 verilog code for slave SPI with FPGA verilog code 16 bit UP COUNTER verilog code for uart communication
Contextual Info: Fully compatible with the MCS 51 instruction set R8051XC2 High-Performance, Configurable, 8-bit Microcontroller Core The R8051XC2 configurable processor core implements a range of fast, 8-bit, microcontrollers that execute the MCS®51 instruction set. The IP core runs with a single clock per machine cycle, and requires an average of 2.12

XILINX ML405

Abstract: 82540EM ML405 PPC405 XAPP1023 linux26 intel 82540EM PPC405 IBM virtex 5 fpga ethernet to pc application TEMAC
Contextual Info: Application Note: Embedded Processing Benchmarking the Performance of the Virtex-4 10/100/1000 TEMAC System R XAPP1023 v1.0 October 3, 2007 Author: Kris Chaplin Abstract This application note provides step-by-step instructions on how to recreate a Tri-Mode Ethernet

HW-AFX-SMA-SFP

Abstract: FPGA UART ML403 XAPP691 ML310 XAPP443 sgmii sfp virtex marvell ethernet switch sgmii ML323 ML401
Contextual Info: Application Note: Ethernet Cores Hardware Demonstration Platform Ethernet Cores Hardware Demonstration Platform R XAPP443 v1.0 July 11, 2005 Summary The Ethernet Cores Hardware Demonstration Platform application note describes the functionality of Ethernet cores in Xilinx FPGA hardware. The development board requirements,

RTAX2000

Abstract: mb 8739 Xilinx VIRTEX-5 xc5vlx50 UT63M143 M38510/55501 5962R99B0106V4C vhdl code manchester encoder UT229FCMV4 h009 SPECIFICATION LEON3FT
Contextual Info: A passion for performance. Aeroflex Colorado Springs Aeroflex Gaisler Aeroflex Plainview Product Short Form Microelectronic Solutions July 2009 HiRel from Aeroflex Colorado Springs UT69151 SµMMIT E • UT69151 SµMMIT™ LXE ■ UT69151 SµMMIT™ DXE

Nucleus PLUS RTOS

Abstract: Nucleus RTOS XPS-AT Nucleus abstract on RTOS and multitasking SPARTAN 3E STARTER BOARD XAPP1016 IC Plus microblaze ethernet 405GP
Contextual Info: Application Note: Embedded Processing R XAPP1016 v1.0 September 13, 2007 Abstract Getting Started with the Nucleus PLUS RTOS and EDGE Tools on the MicroBlaze Processor Author: Mounir Maaref This application note provides an introduction to Nucleus RTOS on the MicroBlaze processor

GSM 900 simulink matlab

Abstract: ORELA 4500 voice recognition matlab simulink ZSPneo verilog code for speech recognition Ceva-XS1100 TMS320C5507 PNX5220 CW5521 Xtensa
Contextual Info: specialsection EDN 2005 DSP DIRECTORY TARGETED DSPs TAKE AIM DSP OPTIONS CONTINUE TO EXPAND AND ARE TARGETING OPTIMIZED CONFIGURATIONS FOR SPECIFIC APPLICATIONS. CHECK OUT THE INAUGURAL ONLINE TABLE FOR A DETAILED VIEW OF CURRENT DEVICE AND CORE OFFERINGS.