IDELAY Search Results

XAPP851

Abstract: ddr phy VIRTEX-5 DDR PHY ddr phy design DDR400 JESD79E PC3200 sdram pcb layout ddr IDELAY x851
Contextual Info: Application Note: Virtex-5 Family DDR SDRAM Controller Using Virtex-5 FPGA Devices R Author: Toshihiko Moriyama and Rich Chiu XAPP851 v1.1 July 14, 2006 Summary This application note describes a 200-MHz DDR SDRAM (JEDEC DDR400, PC3200 standard) controller implemented in a Virtex -5 device. This implementation uses IDELAY elements to

X0Y24

Abstract: RAMB36 XAPP224 XAPP861 IDELAY vhdl code for clock and data recovery RAMB18 RAMB16 vhdl code for phase shift XAPP224 DATA RECOVERY
Contextual Info: Application Note: Virtex-4 and Virtex-5 FPGA Families R XAPP861 v1.1 July 20, 2007 Summary Efficient 8X Oversampling Asynchronous Serial Data Recovery Using IDELAY Author: John F. Snow Asynchronous serial data interfaces require the receiver to recover the data by examining the

TC8600F

Abstract: 1126to PHOTO INTERRUPT ROTATING SPEED SENSOR 360rpm magnetic head FDD
Contextual Info: TOSHIBA INTEGRATED CIRCUIT TC8600F TECHNICAL DATA TC8600F Fl o pp y Disk Mechanism Controller INTRODUCTION The FDMC-II TC8600F is a one chip C-MOS LSI in which the control logic of FLOPPY DISK DRIVE (FDD), together with the 4-bit CPU and required random logic.

ksy 11

Contextual Info: y UC1875/6/7/8 UC2875/6/7/8 UC3875/6/7/8 UNITRODE Phase Shift Resonant Controller FEATURES DESCRIPTION • Zero to 100% Duty Cycle Control • Programmable Output Turn-On Delay The UC1875 family of integrated circuits implements control of a bridge power stage by phase-shifting the switching of one half-bridge with respect

Contextual Info: H IN T E G R A T E D ! C IR C U IT 8 y UC1875/6/7/8 UC2875/6/7/8 UC3875/6/7/8 U N IT R O D E Phase Shift Resonant Controller FEATURES DESCRIPTION • Zero to 100% Duty Cycle Control The UC1875 family of integrated circuits implements control of a bridge power stage by phase-shifting the

L99A

Abstract: lp2987 2988aim3.3
Contextual Info: LP2987,LP2988 LP2987/LP2988 Micropower, 200 mA Ultra Low-Dropout Voltage Regulator with Programmable Power-On Reset Delay; Low Noise Version Available LP2988 Literature Number: SNVS004I LP2987/LP2988 Micropower, 200 mA Ultra Low-Dropout Voltage Regulator with Programmable Power-On Reset Delay;

Voltage-Controlled-Attenuator

Abstract: OPA221 JEDEC J-STD-020d 842 FET ch8c *vp1208 AFE5807 AFE5808AZCF
Contextual Info: AFE5808A www.ti.com SLOS729B – OCTOBER 2011 – REVISED APRIL 2012 Fully Integrated, 8-Channel Ultrasound Analog Front End with Passive CW Mixer, 0.75 nV/rtHz, 14/12-Bit, 65 MSPS, 158 mW/CH Check for Samples: AFE5808A FEATURES APPLICATIONS • • • 1

ucc2580

Abstract: UCC2580D-2 UCC2580-1 active clamp controller zvs flyback driver DIL-16 SOIC-16 UCC1580 UCC1580-1 UCC3580
Contextual Info: UCC1580-1,-2,-3,-4 UCC2580-1,-2,-3,-4 UCC3580-1,-2,-3,-4 Single Ended Active Clamp/Reset PWM FEATURES Provides Auxiliary Switch Activation Complementary to Main Power Switch Drive Programmable deadtime Turn-on Delay Between Activation of Each Switch Voltage Mode Control with

Contextual Info: FSFR-Series / FSFR2100 Fairchild Power Switch FPS for Half-Bridge Resonant Converter Features Description ƒ FSFR-series is a highly integrated power switch family specially designed for high-efficiency half-bridge resonant converters. Offering everything necessary to

KA1H0265

Abstract: KA1H0265R KA1H0265R-TU KA1H0265R-YDTU KA1M0265R KA1M0265R-TU KA1M0265R-YDTU
Contextual Info: www.fairchildsemi.com KA1M0265R/KA1H0265R Fairchild Power Switch FPS Features Description • • • • • • • • • The Fairchild Power Switch(FPS) product family is specially designed for an off line SMPS with minimal external components. The Fairchild Power Switch(FPS) consist of

Contextual Info: www.fairchildsemi.com KA2S0680B Fairchild Power Switch SPS Features Description • • • • • • • • • The SPS product family is specially designed for an off-line SMPS with minimal external components. The SPS consist of high voltage power SenseFET and current mode PWM Controller IC. PWM controller features integrated fixed oscillator,

uc 3843 gm

Abstract: AS2214 LM338 model SPICE uc3842 unitrode 100 watt dc-dc driver schematic DIP ic UC 3843 as431 application note Astec Semiconductor ASTEC RF modulator Astec Semiconductor as3842 application notes Astec Semiconductor as3842
Contextual Info: Table of Contents Table of Contents . 1 Introduction . 3

Contextual Info: UC2875ĆEP PHASE SHIFT RESONANT CONTROLLER ą ą SGLS233 − FEBRUARY 2004 D Controlled Baseline D D D D D D D D D D D D D D D − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −25°C to 110°C Enhanced Diminishing Manufacturing

AN3359

Abstract: TDA7402 TQFP44 bandpass subwoofer filter circuits subwoofer-circuit with ic D00AU1130
Contextual Info: TDA7402 CARRADIO SIGNAL PROCESSOR • 3 STEREO INPUTS ■ 3 MONO INPUTS ■ DYNAMIC-COMPRESSION-STAGE FOR CD ■ SOFTSTEP-VOLUME ■ BASS, TREBLE AND LOUDNESS CONTROL ■ VOICE-BAND-FILTER ■ DIRECT MUTE AND SOFTMUTE ■ INTERNAL BEEP ■ FOUR INDEPENDENT SPEAKER-OUTPUTS

DESIGN WITH UC3875

Abstract: UC3875 slope in uc3875 phase shifted zero voltage UC1875
Contextual Info: application INFO available UC1875/6/7/8 UC2875/6/7/8 UC3875/6/7/8 Phase Shift Resonant Controller FEATURES DESCRIPTION • Zero to 100% Duty Cycle Control The UC1875 family of integrated circuits implements control of a bridge power stage by phase-shifting the switching of one half-bridge with respect

Contextual Info: Artix-7 FPGAs Data Sheet: DC and Switching Characteristics DS181 v1.6 April 17, 2013 Product Specification Introduction Artix -7 FPGAs are available in -3, -2, -1, and -2L speed grades, with -3 having the highest performance. The -2L devices can operate at either of two VCCINT voltages, 0.9V

Contextual Info: Virtex-7 T and XT FPGAs Data Sheet: DC and AC Switching Characteristics DS183 v1.18 November 26, 2013 Product Specification Introduction Virtex -7 T and XT FPGAs are available in -3, -2, -1, and -2L speed grades, with -3 having the highest performance.

XAPP1014

Abstract: smpte 424m to smpte 274m 3G-SDI serializer XAPP224 DATA RECOVERY 425M SMPTE-305M PCIe BT.656 ML571 vhdl code for multiplexing Tables in dvb-t SONY service manual circuits
Contextual Info: Audio/Video Connectivity Solutions for Virtex-5 FPGAs Reference Designs for the Broadcast Industry: Volume 2 XAPP1014 v1.2 November 9, 2009 Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development

KA1M0965R

Abstract: KA1M0965R-TU KA1M0965R-YDTU
Contextual Info: www.fairchildsemi.com KA1M0965R Fairchild Power Switch FPS Features Description • • • • • • • • • The Fairchild Power Switch(FPS) product family is specially designed for an off line SMPS with minimal external components. The Fairchild Power Switch(FPS) consist of

Contextual Info: 7 Series FPGAs Clocking Resources User Guide UG472 v1.8 August 7, 2013 The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL

KA1H0280RB

Abstract: KA1H0280RB-TU KA1H0280RB-YDTU KA1M0280RB KA1M0280RB-TU KA1M0280RB-YDTU ydtu
Contextual Info: www.fairchildsemi.com KA1M0280RB/KA1H0280RB Fairchild Power Switch FPS Features Description • • • • • • • • • The Fairchild Power Switch(FPS) product family is specially designed for an off line SMPS with minimal external components. The Fairchild Power Switch(FPS) consist of high

dm0365r

Abstract: DVD player circuit diagram for smps power supply dl0365r SCHEMATIC DIAGRAM SMPS 12v 2A dm0365r ic dm0365r EER-2828 DM0365 FET marking code .N5 dvd player smps EER2828
Contextual Info: www.fairchildsemi.com FSDL0365RN, FSDM0365RN Green Mode Fairchild Power Switch FPSTM Features • Internal Avalanche Rugged Sense FET • Consumes only 0.65W at 240VAC & 0.3W load with Advanced Burst-Mode Operation • Frequency Modulation for EMI Reduction

TDC 310 thermistor

Abstract: TDC 310 NTC thermistor TDC 310 NTC NTC 102 "AMD Processors" 1N4148 ADP3120A ADP3196 IPD09N03L soft start circuit 555 timer
Contextual Info: 6-Bit Programmable 2- to 4-Phase Synchronous Buck Controller ADP3196 FUNCTIONAL BLOCK DIAGRAM FEATURES VCC RT 12 31 RAMPADJ 13 SHUNT REGULATOR SET + CMP – GND 18 + CMP – – 800mV EN 19 OD OSCILLATOR UVLO SHUTDOWN + 1 CURRENT BALANCING CIRCUIT – 1.8V

INTEL 845 MOTHERBOARD CIRCUIT diagram

Abstract: 1N4148 ADP3120A ADP3188 intel 845 MOTHERBOARD pcb CIRCUIT diagram SUPPLY-ADP3190A 228nF
Contextual Info: 6-Bit, Programmable 2-/3-/4-Phase, Synchronous Buck Controller ADP3190 FEATURES Selectable 2-, 3-, or 4-phase operation at up to 1 MHz per phase ±9.5 mV worst-case differential sensing error over temperature Logic-level PWM outputs for interface to external