U2 A10 Search Results

SAC405

Abstract: GRM155R71C104KA01 SARA-G340 SARA-G300 SARA-U260
Contextual Info: SARA-G3 and SARA-U2 series GSM/GPRS and GSM/EGPRS/HSPA Cellular Modules System Integration Manual Abstract This document describes the features and the system integration of the SARA-G3 series GSM/GPRS cellular modules and the SARA-U2 GSM/EGPRS/HSPA cellular modules.

10KR2J-3-GP

Contextual Info: 4 3 100mv maximum pk-pk ripple on 3D3V_VDD_S0 3D3V_VDD_S0 S Do Not Stuff R2 Do Not Stuff 1 2 LAYOUT: 1 .Place R2 close to U2 pads D7 & D8 (2).Device U4 and U1 should located as close as possible to U2. FP CN1 3D3V_OVC_S0 16 U3 Do Not Stuff Do Not Stuff R6

AD634

Abstract: 16MHZ SNC710 D2C12 AD041 D8D11
Contextual Info: U2 CVDD VDD 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 GND ALE_CLK U2 114 58 VDD 86 SNC710 12 CVDD (33) CVDD (53) CVDD VDD (9) VDD (45) VDD (58) (22) LXIN 47uF GND GND 117 46 81 4.7uF 15pF 13 32768 220K 79 77 0.1uF 76 125 (21) LXOUT RST_ (51) TEST (49)

750-101-r1k

Abstract: wavevsn brd 4.4 10k resistor pack 767163 manual nte RD5.1 mc10h125
Contextual Info: October 2001 Rev 1 National Semiconductor Evaluation Board Instruction Manual ADC08200 8-Bit, 10 MSPS to 230 Msps, Analog-to-Digital Converter with Internal Sample & Hold JP1 DELAY1 DELAY0 TP4 DGND NUMEM J8 DIV_EN J7 J4 U9 U8 U2 U7 U1 J1 ADCCLK L3 L4 J2 MEM

ctx112

Abstract: ADC78H90 P1145-HC ADC78H89 ADC78H90EVAL AWG2000 ANA1-10 CTX112-ND S9601-ND A19351-ND
Contextual Info: October 2005 Rev C National Semiconductor Evaluation Board Instruction Manual ADC78H90 8- Channel, 500 KSPS, 12-Bit Analog-to-Digital Converter AVDD VR1 J6 DVDD VR2 TP3 GND TP9 TP2 VSS_In GND TP6 TP7 AVDD J3 VDD_In U2 J4 J7 OFFSET VR4 J5 ADC78H90 J9 J8 TP5

ctx112

Abstract: 100uH inductor 24C02/SO8 LMH6718 ADC78H89 ADC78H89EVAL ADC78H90 AWG2000 ED161 24C02 CABLE PROGRAM
Contextual Info: October 2005 Rev D National Semiconductor Evaluation Board Instruction Manual ADC78H89 8- Channel, 500 KSPS, 12-Bit Analog-to-Digital Converter AVDD VR1 DVDD VR2 J6 TP3 GND TP9 TP2 VSS_In GND TP6 TP7 AVDD J3 VDD_In U2 J4 J7 OFFSET VR4 J5 ADC78H90 J9 J8 TP5

Contextual Info: ADVANCE DRAM 4 MEG x 16 3.3V, BURST EDO FEATURES PIN ASSIGNMENT Top View • Burst order, interleave or linear, programmed byexecuting WCBR cycle after initialization • Single +3.3V ±5% power supply • Industry-standard xl6 pinout and package • 13 row-addresses, 9 column-addresses (U2) or

smd 3y3

Abstract: SMD K22 smd 1a2 RCA 2A3 JB16 smd 2a3 AL300 AVDD300 DVDD300 6 pin mini din lcd
Contextual Info: A B C D E 14.318MHz Opt AVDD300 DVDD300 Y1 10uh(Opt) VDOUT[15:0] 3 U2 2 20 22 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 O1 O2 O3 O4 O5 O6 O7 O8 ROMD0 ROMD1 ROMD2 ROMD3 ROMD4 ROMD5 ROMD6 ROMD7 VDOUT7 VDOUT6 VDOUT5 VDOUT4 VDOUT3 VDOUT2 VDOUT1 VDOUT0

TXC 14.3MHz

Abstract: CON10AP D6145 CON6A dsrc Hdr4x2 RIA15 ria 15 CON4 1N914
Contextual Info: 4 3 2 +3.3V PCA11 PCA10 PCA9 PCA8 PCA7 PCA6 PCA5 PCA4 PCA3 PCA2 PCA1 PCA0 22P_1206 3 C14 22P_1206 C13 GND .1_1206 C11 .01_1206 C10 C 4 3 DO NOT INSTALL DGND AGND J3 1 2 CON2 MUL_EXTER_CLK 5 CLOCK XTAL2 ST49C101A-06 U2 .1_1206 C22 C21 .1_1206 2 +P .01_1206

Contextual Info: 244PIN DDR2 533 Registered Mini-DIMM 1024MB With 128Mx8 CL4 TS128MNQ72V5U Description Placement The TS128MNQ72V5U is a 128M x 72bits DDR2-533 Registered Mini-DIMM. The TS128MNQ72V5U consists E of 9 pcs 128Mx8its DDR2 SDRAMs in 68 ball FBGA U2 U1 package, 1 pcs register in 96 ball uBGA package, 1 pcs

diode t25 4 B9

Abstract: transistor af18 socket s1 diode t25 4 d9
Contextual Info: P1 TTL0 D3 A1 TTL3 A2 TTL6 A3 TTL9 P1 D2 D1 D0 A4 S1-W2 S1-AA4 S1-AD3 S1-AE3 TTL1 P1 D4 B1 TTL4 B2 TTL7 B3 TTL10 B4 AID6 A5 TTL12 B5 AID5 A6 TTL14 B6 AID4 A7 PVCC B7 AID0 A8 +5V B8 AID1 A9 TTL18 B9 AID2 A10 AGND B10 AID3 A11 TTL44 B11 S1-U2 S1-R2 D6 TDI TTL2

odb2 connector

Abstract: RX232 7408 texas 74139 texas 74HC00 IDMT 10BASET TINI SOCKET MM-001 4x20 lcd
Contextual Info: A D RS232 EXPANSION PORTS WITH STANDARD CONTROL LINES 512K FLASH ROM 160MM 1 J4 Y1 R6 R15 16 J17 Serial3 1 R5 J10 R16 J19 R1 DUAL 16552 UART (REAR OF PCB) Serial0 J20 R4 C18 Serial2 U2 J6 J18 NETWORK C9 R12 iBUTTON SOCKET 2 S2 D1 J12 100MM L1 R2 138 R18

marking 52

Abstract: 16u6
Contextual Info: ADVANCE DRAM 4 MEG x 16 3.3V, BURST EDO FEATURES PIN ASSIGNMENT Top View • Burst order, interleave or linear, program med by executing W CBR cycle after initialization • Single +3.3V ± 5% power supply • Industry-standard x l6 pinout and package • 13 row-addresses, 9 colum n-addresses (U2) or

1v17

Contextual Info: P U M A 2 U2 0 0 0 m o i a i c PUMA 2U2000-12/15/17/20 Issue 12 .: February 1990 ADVANCE PRODUCT INFORMATION Semiconductor Inc. Pin Definition 1.048.576 bit CMOS High Speed UV EPROM FMtures User Configurable as 8,16 or 32 bit wide. Very Fast access times of 120/150/170/200 ns.

um9008

Abstract: PA6 GF 30 PA6 GF 25 PA6 GF 50 PA6 GF 15 PA6 GF 40 CD4039 A1311-12 equivalent sd 48 41 SA11
Contextual Info: 1 2 3 4 5 A R25 1K BC5 0.1uF SA[0.19] +12V LED SA[0.19] VCC U2 SMEMR IOWIOR- SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 26 27 28 29 30 31 32 33 SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15 88 87 86 85 84 83 82 81 SA8 SA9 SA10 SA11 SA14 SA15 SA16 SA17 SA18 SA19 SYSCLK IRQ5

VG-469 Reference Design #6

Abstract: Vadem vadem VG 469 DR22 dr25 diode datasheet VG-469 BCA25 74HC08 74HC08 data sheet DR25
Contextual Info: 8 7 6 5 4 3 2 1 +12V U4 1 R17 100K 3 2 D 4 +12V +12V S1 D1 S2 D1 G1 D2 G2 SI9956 D2 8 3.3V 7 6 D 5 A_CARD_VCC VCC R18 100K U5 1 3 + C18 10uF C19 0.1uF 2 4 +12V +12V U2 18 19 A_VPPEN1 A_GPIO 2 3 A_VCCEN1 A_VCCEN0 A_VCCEN1 A_VCCEN0 6 7 B_VPPEN1 B_VPPEN1 4 5

SMD a7 Transistor

Abstract: smd transistor A7 1117 3.3 smd transistor A6 smd transistor A13 SmD a7 smd transistor A5 smd transistor A11 smd transistor A8 BC712
Contextual Info: 5 4 3 2 1 3.3V 3.3V A[0.14] D D[0.7] 3.3V R5 4.7K /INT_W3100A U2 U1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 21 20 19 18 17 16 15 14 11 10 9 8 7 6 5 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 D0 D1 D2 D3 D4 D5 D6 D7 32 31 30 29 27 26 25 24

opto P113

Abstract: p112 opto LD1085-33 3v3 sot A9 sot323 jtms 100 V334 A18 sot M74HC126 ESDA6V1-5W6
Contextual Info: BOOT BOOT_EN SW2 SW1 +3V3 GND BOOT CLK CK RTCXTI RTCXTO +3V3 GND UARTx GND +3V3 +5V TX_0 RX_0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 MISO GND MOSI U2 I/O1 I/O5 GND I/O4 I/O2 I/O3 U3 not Reset 6 DBGRQS SCLK 5 4 ESDA6V1-5W 6-SOT323-6L 1 2 3 ESDA6V1-5W 6-SOT323-6L

fb51

Abstract: 2n3904 a19 pd35 CFG14 a13 amp FB26 VP12 AD10 AD11 AD12
Contextual Info: A B C D E Rev A0.5 note: Clean up some errors, added text note. Rev A0.7 Note: RGB filter redesign. DDC stuff. MD[0:7] MA[0:15] U2 8 7 6 5 4 3 2 1 MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12 MA13 MA14 MA15 S1 SW DIP-8 4 9 10 11 12 13 14 15 16 MD7

et0350

Abstract: AX1117
Contextual Info: A 1 B C D E F G H I J 1 DC7.5V~10V 1 Vin Vout + 3 GND SW C2 100uF LD1117-5 2 2 1 BNC 3V3 U2 5V 3 C3 Vin C34 10uF/1206 + 100uF ADJ/GND U1 SW1 2 Vout C1 10uF/1206 R1 1K/0805 AX1117-33 1 DC1 2 2 Vin 3 Vout 2 C4 10uF/1206 AX1117-33 1 C5 10uF/1206 ADJ/GND 3 D2

MH4 PG

Abstract: XA11 48 MHz Crystal KL5KUSB111 IDT71256 TP14-TP15 XA15 TP252 MH411
Contextual Info: A B C D E XD[0:7] VCC POWER-ON RESET XA[0:15] 32Kx8 SRAM VCC U2 TP1 NC NC NC NC NC NC NC NC NC U1 + C1 1uF 67 TP5 68 TP8 57 62 14 16 29 32 30 31 15 2 PDN# 2 TxD 2 TxEN 2 TxCLK 2 RxD 2 RxCLK 2 PHYCRS 2 PHYCOL 3 2 LINKSTATUS VCC R3 30 R4 30 R2 36 35 39 38 37

P137

Abstract: P130 P131 P132 P133 P134 P155 p146 Renesas M30835 P135 LCD
Contextual Info: 4 3 V CC J1 C3 U2 D S2 R5 680 R6 680 D1 RED S3 R1 680 D2 YELLOW D3 G REEN 1 S1 R4 10K P7_2 P7_2 C P7_4 P7_4 NMI P8_5 V CC R31* 3 Vo R32* LCD Module DB0 DB1 DB2 DB3 Vss R10 10K 3 B Vcc 7 8 9 10 2 10K Contrast 2 DB4 DB5 DB6 DB7 11 12 13 14 RS EN R/W 4 6 5 ACM0802B

usb mp3player

Abstract: mp3player 74HC00 MAX232CSE 74HC138 K9FXX08UOB K746 LM1117 CS4331 DD10
Contextual Info: 1 2 1 Vin POWER D 3 VCC 3 Vout 4 R6 R7 R2 1K 2 1 5 R8 R9 VCC D1 LED C1 1000u 2 J2 GND J1 U1 LM1117 R1 1.5k POWER1 J3 R10 R12 R11 R13D0 D1 D2 D3 D4 D5 D6 D7 U2 D0 3 D1 4 D14 7 D15 8 D12 13 D13 14 D2 17 D3 18 D0 D1 D2 D3 D4 D5 D6 D7 1 11 5 4 3 2 1 Q0 Q1 Q2 Q3

RTL8201CP

Abstract: RD1-125BAG1A IP101A 120R-100MHZ IP101A lf W3100A-LF IP101A LQFP48 RD1125BAG1A AVDD33 IP101ALF
Contextual Info: 5 4 3 2 1 3.3V U1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 21 20 19 18 17 16 15 14 11 10 9 8 7 6 5 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 D0 D1 D2 D3 D4 D5 D6 D7 32 31 30 29 27 26 25 24 D0 D1 D2 D3 D4 D5 D6 D7 /INT /CS /WR /RD 61 64 62