TTL AF Search Results

HLT28

Abstract: HT28 KLT28 KT28 MC100ELT28 MC10ELT28 MC10ELT28D
Contextual Info: MC10ELT28, MC100ELT28 5 V TTL to Differential PECL and Differential PECL to TTL Translator Description • • • • • • • • • • 3.5 ns Typical PECL to TTL Propagation Delay 1.2 ns Typical TTL to PECL Propagation Delay PNP TTL Inputs for Minimal Loading

HLT28

Abstract: KLT28 MC100 MC100ELT28 MC10ELT28 transistor k 4110
Contextual Info: MC10ELT28, MC100ELT28 5 V TTL to Differential PECL and Differential PECL to TTL Translator Description • • • • • • • • • • 3.5 ns Typical PECL to TTL Propagation Delay 1.2 ns Typical TTL to PECL Propagation Delay PNP TTL Inputs for Minimal Loading

Contextual Info: ^ TTL CONTROLLED AMPLIFIERS AFTL SERIES FEATURES • TTL Switched Power Supply • Built-In TTL Driver • Ideal for: - Remote Power Control - Low Power Consumption - Thermal Management Systems • Standard AFS Low Noise Performance • Specifications: - Rise Time <2.0 ps

GTLP16T1655

Abstract: curve
Contextual Info: Revised October 1999 Extended Characterization Data GTLP16T1655 DC Characteristics TTL Port – IOH/IOL Curve GTLP16T1655 TTL Port - IOZ/IIN Curve GTLP16T1655 TTL Port - IOFF Curve GTLP16T1655 TTL Port - IPU Curve GTLP16T1655 1999 Fairchild Semiconductor Corporation

Contextual Info: IDT74GTLP816 GTLP / TTL 1:2 / 1:6 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE GTLP/TTL 1:2/1:6 CLOCK DRIVER FEATURES: • • • • • • • • DESCRIPTION: 5V or 3.3V operation Interface between GTLP and TTL logic levels GTLP to TTL 1:6 fanout TTL to GTLP 1:2 fanout

CHARACTERIZATION

Abstract: GTLP6C816 GTLP6C816A curve
Contextual Info: Revised December 2000 Extended Characterization Data GTLP6C816A DC Characteristics TTL Port – IOL/IOH Curve GTLP6C816A TTL Port - IIN Curve GTLP6C816A TTL Port – IOZ Curve GTLP6C816A TTL Port – IOFF Curve GTLP6C816A 2000 Fairchild Semiconductor Corporation

Contextual Info: 5V TTL-TO-DIFFERENTIAL PECL AND DIFFERENTIAL PECL-TO-TTL TRANSLATOR FEATURES SY10ELT28 SY100ELT28 DESCRIPTION • Guaranteed AC parameters over temperature: • fMAX > 160MHz TTL • < 5.5ns PECL-to-TTL propagation delay • < 1.5ns tr / tf; PECL output

Contextual Info: IDT74GTLP816 GTLP / TTL 1:2 / 1:6 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE GTLP/TTL 1:2/1:6 CLOCK DRIVER FEATURES: • • • • • • • • DESCRIPTION: 5V or 3.3V operation Interface between GTLP and TTL logic levels GTLP to TTL 1:6 fanout TTL to GTLP 1:2 fanout

SY100ELT28

Abstract: SY100ELT28ZI SY100ELT28ZITR SY10ELT28 SY10ELT28ZI SY10ELT28ZITR
Contextual Info: 5V TTL-TO-DIFFERENTIAL PECL AND DIFFERENTIAL PECL-TO-TTL TRANSLATOR FEATURES SY10ELT28 SY100ELT28 FINAL DESCRIPTION • Guaranteed AC parameters over temperature: • fMAX > 160MHz TTL • < 5.5ns PECL-to-TTL propagation delay • < 1.5ns tr / tf; PECL output

XEL28

Abstract: marking k8 diode
Contextual Info: 5V TTL-TO-DIFFERENTIAL PECL AND DIFFERENTIAL PECL-TO-TTL TRANSLATOR FEATURES SY10ELT28 SY100ELT28 FINAL DESCRIPTION • Guaranteed AC parameters over temperature: • fMAX > 160MHz TTL • < 5.5ns PECL-to-TTL propagation delay • < 1.5ns tr / tf; PECL output

MC10ELT/100ELT28

Abstract: DL140 MC100ELT28 MC10ELT28
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information MC10ELT28 TTL to Differential PECL/Differ- MC100ELT28 ential PECL to TTL Translator The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL

Contextual Info: *SYNERGY PECL/TTL-TTL 1:8 CLOCK DISTRIBUTION CHIP SEMICONDUCTOR FEATURES Clockworks PRELIMINARY SY10/100H646 DESCRIPTION • PECL/TTL-TTL version of popular ECLinPS E111 ■ Meets specifications required to drive highperformance x86 processors ■ Guaranteed low skew specification

9434

Abstract: CY101E383 EME-6300H
Contextual Info: Reliability Report QTP# 94346/95255, Version 1.0 June, 1996 BiCMOS ECL-TTL/TTL-ECL TRANSLATOR MARKETING PART NUMBERS DESCRIPTION CY101E383 ECL/TTL/ECL Translator and High Speed Bus Driver CY10E383 ECL/TTL/ECL Translator and High Speed Bus Driver CYPRESS SEMICONDUCTOR

IDT74GTLP816

Contextual Info: IDT74GTLP816 GTLP / TTL 1:2 / 1:6 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE GTLP/TTL 1:2/1:6 CLOCK DRIVER FEATURES: • • • • • • • DESCRIPTION: Interface between GTLP and TTL logic levels GTLP to TTL 1:6 fanout TTL to GTLP 1:2 fanout Edge Rate Control Circuit reduces output noise on GTLP port

Contextual Info: DS75365 DS75365 Quad TTL-to-MOS Driver Literature Number: SNOSBR5A DS75365 Quad TTL-to-MOS Driver Y The DS75365 is a quad monolithic integrated TTL-to-MOS driver and interface circuit that accepts standard TTL input signals and provides high-current and high-voltage output

IC TTL 74LS00

Abstract: TTL LS 7400 IC TTL 74 ls 04 7400 fan-out cmos 7400 fan-out TTL 7400 catalog TTL 74ls00 TTL 7400 rise and fall time of ic 74ls00 74LS00 gate
Contextual Info: Design Considerations, Testing and Applications Assistance Form FAST AND LS TTL FAST AND LS TTL DATA 3-1 3 DESIGN CONSIDERATIONS SELECTING TTL LOGIC. TTL Families may be mixed in a system for optimum performance. For instance, in new designs, ALS would commonly be used in non-critical speed paths to minimize power consumption while FAST TTL would be used in high

KLT28

Abstract: HLT28 HT28 KT28 MC100ELT28 MC10ELT28 transistor k 4110
Contextual Info: MC10ELT28, MC100ELT28 5V TTL to Differential PECL and Differential PECL to TTL Translator The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL Positive ECL levels are used, only +5 V and ground are

HLT28

Abstract: HT28 KLT28 KT28 MC100ELT28 MC10ELT28
Contextual Info: MC10ELT28, MC100ELT28 5 V TTL to Differential PECL and Differential PECL to TTL Translator Description • • • • • • • • • • 3.5 ns Typical PECL to TTL Propagation Delay 1.2 ns Typical TTL to PECL Propagation Delay PNP TTL Inputs for Minimal Loading

Contextual Info: MC10ELT28, MC100ELT28 5 V TTL to Differential PECL and Differential PECL to TTL Translator Description • • • • • • • • • • 3.5 ns Typical PECL to TTL Propagation Delay 1.2 ns Typical TTL to PECL Propagation Delay PNP TTL Inputs for Minimal Loading

Contextual Info: « PECL/TTL-TTL 1:8 CLOCK DISTRIBUTION CHIP C V M C O rV SEMICONDUCTOR FEATURES Clockworks PRELIMINARY SY10/100H646 DESCRIPTION • PECL/TTL-TTL version of popular ECLìnPS E111 ■ Meets specifications required to drive highperformance x86 processors ■ Guaranteed low skew specification

Contextual Info: DS75361 DS75361 Dual TTL-to-MOS Driver Literature Number: SNOSBR4A DS75361 Dual TTL-to-MOS Driver General Description Features The DS75361 is a monolithic integrated dual TTL-to-MOS driver interface circuit The device accepts standard TTL input signals and provides high-current and high-voltage

klt28

Abstract: MC10ELT28 HLT28
Contextual Info: MC10ELT28, MC100ELT28 5 V TTL to Differential PECL and Differential PECL to TTL Translator The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL Positive ECL levels are used, only +5 V and ground are

KLT28

Abstract: kt28 HLT28 HT28 MC100ELT28 MC10ELT28
Contextual Info: MC10ELT28, MC100ELT28 5 V TTL to Differential PECL and Differential PECL to TTL Translator The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL Positive ECL levels are used, only +5 V and ground are

CY101E383

Abstract: E383 R2170 ecl 84
Contextual Info: E383 CY101E383 ECL/TTL/ECL Translator and High-Speed Bus Driver Features • BiCMOS for optimum speed/power • High speed max. — 3.0 ns tPD TTL-to-ECL Functional Description The CY101E383 is a new-generation TTL-to-ECL and ECL-to-TTL logic level translator designed for high-perfor-