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    onsemi

    onsemi MC10ELT22DG

    IC: digital; logic level voltage translator; Ch: 2; SMD; SO8; tube
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    TME MC10ELT22DG 1
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    Rochester Electronics MC10ELT22DG 2,807 1
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    ComSIT USA MC10ELT22DG 125
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    onsemi MC10ELT21DG

    IC: digital; non-inverting,logic level voltage translator; Ch: 1
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    TME MC10ELT21DG 1
    • 1 $3.16
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    Avnet Americas MC10ELT21DG Tube 392
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    RS MC10ELT21DG Bulk 2
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    Bristol Electronics MC10ELT21DG 30
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    Rochester Electronics MC10ELT21DG 4,164 1
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    Flip Electronics MC10ELT21DG 3,038
    • 1 $1.60
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    onsemi MC10ELT20DG

    IC: digital; logic level voltage translator; Ch: 1; SMD; SO8; tube
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    TME MC10ELT20DG 1
    • 1 $3.16
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    Rochester Electronics MC10ELT20DG 383 1
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    Vyrian MC10ELT20DG 4,000
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    onsemi MC10ELT25DR2G

    IC: digital; non-inverting,logic level voltage translator; Ch: 1
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    TME MC10ELT25DR2G 1
    • 1 $3.16
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    Rochester Electronics MC10ELT25DR2G 1,125 1
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    Vyrian MC10ELT25DR2G 3,400
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    onsemi MC10ELT25DG

    IC: digital; non-inverting,logic level voltage translator; Ch: 1
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    TME MC10ELT25DG 1
    • 1 $3.16
    • 10 $2.90
    • 100 $2.37
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    RS MC10ELT25DG Bulk 1
    • 1 $5.46
    • 10 $5.02
    • 100 $5.02
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    ComSIT USA MC10ELT25DG 98
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    10ELT Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA D iffe re n tia l PECL to T T L T ra n s la to r M C 10ELT21 M C 100E LT21 The 10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the single gate of


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    10elt21mc10elt/100elt21elt21mc10elt21/d PDF

    Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual TTL to Differential PECL Translator 10ELT22 MC100ELT22 The M C 10ELT/100ELT22 is a dual TTL to differential PECL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The sm all outline 8-lead SOIC package and the low skew, dual


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    mc10elt/100elt22elt2210elt100elt+3300ps100elt1dl140 PDF

    Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA D ifferen tial ECL to TTL Translator 10ELT25 MC100ELT25 The M C 10ELT/100ELT25 is a differential ECL to TTL translator. Because ECL levels are used a +5V, -5.2V or -4.5V and ground are required. The small outline 8-lead SOIC package and the single gate of


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    mc10elt/100elt25elt25200mv100elt+210eltdl140 PDF

    Contextual Info: Precision Edge 10ELT20V SY100ELT20V FINAL FEATURES • ■ ■ ■ ■ ■ ■ 3.3V and 5V power supply options 300ps typical propagation delay Low power Differential PECL output PNP TTL input for minimal loading Flow-through pinouts Available in 8-pin SOIC package


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    sy10elt20vsy100elt20v300pssy10/100elt20v+2elt20v10elt PDF

    Contextual Info: M OTOROLA SEMICONDUCTOR TECHNICAL DATA TTL to Differential PECL Translator 10ELT20 MC100ELT20 The 10ELT/100ELT20 is a TTL to differential PECL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the single gate of


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    mc10elt20mc100elt20mc10elt/100elt20elt20+410elt100eltl3ti72sedl140 PDF

    Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual D ifferential PECL to TTL Translator M C100ELT23 The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual gate


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    c100elt23mc100elt23elt23200mv+1br1330 PDF

    Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA TTL to Differential PECL Translator 10ELT20 MC100ELT20 The MC1OELT/100ELT20 is a TTL to differential PECL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the single gate of


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    mc10elt20mc100elt20mc1oelt/100elt20elt20+410elt100eltbr1330b3b7255 PDF

    Contextual Info: M OTOROLA SEMICONDUCTOR TECHNICAL DATA Differential PECL to TTL Translator 10ELT21 MC100ELT21 The 10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the single gate of


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    mc10elt21mc100elt21mc10elt/100elt21elt21+2200mvdl140 PDF

    Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information TTL to Differential PECL/Differential PECL to TTL Translator 10ELT28 MC100ELT28 The 10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL


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    mc10elt28mc100elt28mc10elt/100elt28elt28+410elt200mvdl140b3b7252 PDF

    7252 motorola

    Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Differential PECL to TTL Translator 10ELT21 MC100ELT21 The 10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the single gate of the


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    mc10elt21mc100elt21mc10elt/100elt21elt21+3200mvdl1407252 motorola PDF

    Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual TTL to Differential PECL Translator 10ELT22 MC100ELT22 The 10ELT/100ELT22 is a dual TTL to differential PECL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the low skew, dual


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    mc10elt22mc100elt22mc10elt/100elt22elt22+310elt100eltdl140 PDF

    Contextual Info: MOTOROLA SEM ICO N D U CTO R bflE ]> • b 3 b ? S S E GD'lSDfia THE M O T O R O L A SC TECHNICAL DATA Product Preview Dual T T L to Differential E C L Translator i nom L O G I C 1 M 10ELT24 M C100ELT24 The 10ELT/100ELT24 is a TTL to differential E C L translator.


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    c10elt24c100elt24mc10elt/100elt24elt24+210eltbr1330/d PDF

    HLT25

    Abstract: MC10ELT25 ELT25 HT25 KLT25 MC100 MC100ELT25 TTL TRANSISTOR MODEL PARAMETER
    Contextual Info: 10ELT25, MC100ELT25 −5V Differential ECL to TTL Translator The 10ELT/100ELT25 is a differential ECL to TTL translator. Because ECL levels are used, a +5 V, -5.2 V or -4.5 V and ground are required. The small outline 8-lead package and the single gate of


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    mc10elt25mc100elt25mc10elt/100elt25elt25+6mc10elt25/dhlt25ht25klt25mc100ttl transistor model parameter PDF

    E142 wafer format

    Abstract: HEL32 MR 4710 IC 300w power amplifier circuit diagram HEL05 klt22 HEL12 HEL31 HEL16 HLT22 HLT28
    Contextual Info: DL140/D Rev. 6, Jan-2001 High Performance ECL Data ECLinPS and ECLinPS Lite™ High Performance ECL Device Data ECLinPS, ECLinPS Lite, and Low Voltage ECLinPS DL140/D Rev. 6, Jan–2001  SCILLC, 2001 Previous Edition  2000 “All Rights Reserved”


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    dl140/djan-2001r14525e142 wafer format+9hel32mr 4710 ic300w power amplifier circuit diagramhel05klt22hel12 hel31hel16hlt22hlt28 PDF

    xel22l

    Abstract: SY100ELT22LZGTR SY10ELT22LZC HEL22L hel22 SY100ELT22L SY10ELT22L SY10ELT22LZCTR
    Contextual Info: Micrel, Inc. 3.3V DUAL TTL-to-DIFFERENTIAL PECL TRANSLATOR FEATURES • ■ ■ ■ ■ ■ ■ 10ELT22L SY100ELT22L 10ELT22L SY100ELT22L DESCRIPTION 3.3V power supply 300ps typical propagation delay <100ps output-to-output skew Differential PECL outputs


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    sy10elt22lsy100elt22l300ps100ps+9sy10/100elt22lelt22lm9999-120705xel22lsy100elt22lzgtrsy10elt22lzchel22lhel22sy10elt22lzctr PDF

    KLT20

    Abstract: ELT20 HT20 MC100ELT20 MC10ELT20 soic8 HT20
    Contextual Info: 10ELT20, MC100ELT20 5V TTL to Differential PECL Translator Description The 10ELT/100ELT20 is a TTL to differential PECL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of


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    mc10elt20mc100elt20mc10elt/100elt20elt20+5hlt20mc10elt20/dklt20ht20soic8 ht20 PDF

    HEL21

    Abstract: ELT21 SY100ELT21 SY10ELT21 SY10ELT21ZC SY10ELT21ZCTR XEL21
    Contextual Info: Micrel, Inc. Precison Edge 10ELT21 Precision Edge® SY100ELT21 DIFFERENTIAL PECL-to-TTL TRANSLATOR 10ELT21 SY100ELT21 FEATURES „ „ „ „ „ „ 2.5ns typical propagation delay Low power Differential PECL inputs 24mA TTL outputs Flow-through pinouts


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    precisionsy10elt21sy100elt21sy10elt21sy10/100elt21+6elt21m9999-031506hel21sy10elt21zcsy10elt21zctrxel21 PDF

    DL140

    Abstract: ELT20 MC100ELT20 MC10ELT20
    Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA TTL to Differential PECL Translator 10ELT20 MC100ELT20 The 10ELT/100ELT20 is a TTL to differential PECL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the single gate of


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    mc10elt20mc100elt20mc10elt/100elt20elt20+410elt100eltdl140mc10elt20/d PDF

    KLT21

    Abstract: hlt21 hl-t21
    Contextual Info: 10ELT21, MC100ELT21 5 V Differential PECL to TTL Translator The 10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of


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    mc10elt21mc100elt21mc10elt/100elt21elt21+7an1404an1405an1406an1503klt21hlt21hl-t21 PDF

    Contextual Info: f""* 1 3.3V D U A L D I F F E R E N T I A L S Y N ER G Y P E C L-to -n t L/ \ r j o Ku f' ^ m I ^ ; PQE, , 71i translator S E M IC O N D U C T O R " ' ' “ DESCRIPTION FEATURES • 2.0ns typical propagation delay ■ <500ps typical output-to-output skew ■ Differential PECL inputs


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    500ps10/100elt23lsy10elt23lzcsy10elt23lzctr+2sy100elt23lzcsy100elt23lzctr PDF

    SY10ELT22L

    Abstract: SY100ELT22L SY10ELT22LZC SY10ELT22LZCTR
    Contextual Info: 3.3V DUAL TTL-to-DIFFERENTIAL PECL TRANSLATOR FEATURES • ■ ■ ■ ■ ■ ■ 10ELT22L SY100ELT22L DESCRIPTION 3.3V power supply 300ps typical propagation delay <100ps output-to-output skew Differential PECL outputs PNP TTL inputs for minimal loading


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    sy10elt22lsy100elt22l300ps100ps+7sy10/100elt22lelt22l10eltcompatit22lzctrsy100elt22lzcsy10elt22lzcsy10elt22lzctr PDF

    SY10ELT23L

    Abstract: SY10ELT23LZC SY10ELT23LZCTR ELT23L SY100ELT23L SY100ELT23LZC
    Contextual Info: 3.3V DUAL DIFFERENTIAL LVPECL-to-LVTTL TRANSLATOR FEATURES • ■ ■ ■ ■ ■ ■ DESCRIPTION 3.3V power supply 2.0ns typical propagation delay <500ps typical output-to-output skew Differential LVPECL inputs 24mA LVTTL outputs Flow-through pinouts Available in 8-pin SOIC package


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    sy10elt23lsy100elt23l500pssy10/100elt23l+5elt23lsy100elt23lzcsy100elt23lzctrsy10elt23lzcsy10elt23lzctr PDF

    KLT20

    Abstract: HLT20 SO-8 ELT20 HT20 MC100ELT20 MC10ELT20
    Contextual Info: 10ELT20, MC100ELT20 5V TTL to Differential PECL Translator Description The 10ELT/100ELT20 is a TTL to differential PECL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of


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    mc10elt20mc100elt20mc10elt/100elt20elt20+5hlt20mc10elt20/dklt20hlt20 so-8ht20 PDF

    10ELT22

    Abstract: 100ELT22 ELT22 SY100ELT22 SY10ELT22
    Contextual Info: * SC'V'hieDS'V YNERGY DUALTTL-to-DIFFERENTIAL PECLTRANSLATOR S E M IC O N D U C T O R FEATURES 10ELT22 SY100ELT22 iu u e li^ DESCRIPTION 300ps typical propagation delay The SY10 /1 00ELT22 are dual T T L-to-differential PECL translators. Because PECL P ositive ECL levels are


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    300ps100pssy10/100elt22elt22+610elt100elt100elt2210elt22sy100elt22sy10elt22 PDF