TS7542 Search Results

TS7542

Contextual Info: fZ T ^ 7# S G S -T H O M S O N TS7542 MULTI MODE MODEM ANALOG FRONT-END A D V A N C E DATA 12 BIT A/D AND D/A CONVERTERS WITH PROGRAMMABLE SAMPLING FREQUENCY : 7.2, 8.0, OR 9.6 kHz 6 TH ORDER SWITCHED CAPACITOR TRANSMIT FILTER TRANSMIT ATTENUATOR PROGRAMMABLE

adc 809

Abstract: L1QM full binary bit subtractor sgs-thomson 1800/2100 duplexer MDLDL mig mag 200 DIP40 PLCC44 TS7542CFN TS7542CP
Contextual Info: fZT S G S -T H O M S O N ^7# TS7542 MULTI MODE MODEM ANALOG FRONT-END A D V A N C E DATA 12 BIT A/D AND D/A CONVERTERS WITH PROGRAMMABLE SAMPLING FREQUENCY : 7.2, 8.0, OR 9.6 kHz 6 TH ORDER SWITCHED CAPACITOR TRANSMIT FILTER TRANSMIT ATTENUATOR PROGRAMMABLE

EPR48

Abstract: LCD 2 x 16 ia87
Contextual Info: r = 7 Ä T # S G S - T H O M S O N R Æ Œ (ô m i(O T (ô K S S T 1 8 9 3 0 /3 1 DIGITAL SIGNAL PR O C ESSO R • 80 ns INSTRUCTION CYCLE TIME ‘ (1.2 (i CMOS technology) ■ PARALLEL HARVARD ARCHITECTURE ■ SEPARATED PROGRAM AND DATA BUSES ■ THREE DATA BUSES STRUCTURE

ncl 071

Abstract: PGA121 4kx16 ram "saturation flag" INSTRUCTION SET motorola 6800 intel 68000 INSTRUCTION SET motorola 1031 PLCC52 24CCR 6800 intel microprocessor pin diagram
Contextual Info: SGS-THOMSON ¿ 5 7 IL itg T T ^ O R O D Ê S ST18930/31 DIGITAL SIGNAL PROCESSOR 80 ns INSTRUCTION CYCLE TIME ‘ 1.2 |i CMOS technology PARALLEL HARVARD ARCHITECTURE SEPARATED PROGRAM AND DATA BUSES THREE DATA BUSES STRUCTURE DUAL EXTERNAL BUSES ONE CYCLE 16-BIT R/W OPERATION ON EX­

S020L

Abstract: operational amplifier ROM SOT s0918 LS404CM tea7532fp LS1241 PLCC32 ETC5040FN ETC5057FN
Contextual Info: /= T SGS-THOMSON SURFACE MOUNT DEVICES Ä 7# mosmiiliiotoimoéi TELECOM AND DATA COMMUNICATIONS INTEGRATED CIRCUITS Type Description ETC5040FN ETC5054FN ETC5057FN ETC5064FN ETC5067FN L3030 LS1240 LS1240A LS1241 LS156 LS204CM.M LS404CM.M LS656 MK5025 TEA7531FP

Contextual Info: S. ? 1993 /= T #. ^7 S C S -T H O M S O N HKSW M S 5 TS 7538 ASYNCHRONOUS-SYNCHRONOUS AND SERIAL-PARALLEL CONVERTER • . . ■ ■ ■ ■ . ■ ■ ■ BOTH ASYNCH R O N O U S AND SYNCHRO­ NOUS M O DES OF OPERATION INCLUDING FULL CCITT V.14 ARHYTHM IC CHARAC­

Contextual Info: 0011103 1 ‘" P 7 5 ^ 2 -O S S G S -T H O M S O N * TS75C25 t 7 V.22 BIS, V.22, BELL 212, V.21 V.23, BELL 103 M O D EM C H IP SET ADVANCE DATA • CCITT V.22 BIS COMPATIBLE MODEM CHIP of modems complying with CCITT V.21, V.22, V.23, SET and BELL 103, 212 recommendations. The modem

3AD3

Abstract: barrel shifter block diagram intel 68000 INSTRUCTION SET lb 8930 TS68930 TS68931 block diagram for barrel shifter aos Manufacturing date code "saturation flag" xacu
Contextual Info: f Z 7 SGS-THOMSON m 7# [RÆQ g[i? iUi Tr^©[ïaO(gS TS68930/31 DIGITAL SIGNAL PR O C ESSO R 160ns INSTRUCTION CYCLE TIME PARALLEL HARVARD ARCHITECTURE SEPARATED PROGRAM AND DATA BUSES THREE DATA BUSES STRUCTURE DUAL EXTERNAL BUSES ONE CYCLE 16-BIT R M OPERATION ON EX­

D347D

Abstract: ST18940 "saturation flag" 32 bit barrel shifter circuit diagram using multi
Contextual Info: f Z 7 SGS-THOMSON Ä 7 # O^D l^@llLli@¥l^@ß!lfl©i TS68930/31 DIGITAL SIGNAL PROCESSOR • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 160ns INSTRUCTION CYCLE TIME PARALLEL HARVARD ARCHITECTURE SEPARATED PROGRAM AND DATA BUSES THREE DATA BUSES STRUCTURE